High performance power supply rejection ratio linear regulator

Low dropout regulators (LDOs) are primarily used to generate low ripple, low noise power supplies for audio and RF circuits. They can also be used as local clean power supplies for frequency synthesizers and VCOs. Typically, the input to an LDO is a supply voltage with a broadband AC ripple superimposed on the DC voltage. Electrical noise caused by current changes through the battery and connector impedance is one example of broadband AC ripple. LDOs can be used to fully suppress these parasitic signals. The input of an LDO can also be connected to the output of a switching regulator to provide a clean, low noise output voltage. In this application, the LDO must be able to handle switching frequencies from 100kHz to over 3MHz.

First, the LDO regulator can be viewed as a low-loss, compact, multisection low-pass filter with switching capabilities. However, this model has several limitations, especially the ability to reject wideband ripple at the input. Assuming the operating current is less than 250μA (for reasonable efficiency), the IC designer can optimize some key performance factors such as noise, regulation, and power supply rejection ratio within the gain-bandwidth limit caused by the low quiescent current. Further performance improvements require other measures.

When a high-performance power supply is needed, the designer should start by adding as many functions as possible to the regulator. The following will use the AS1358-9 component with an output noise of 9μVrms and a power supply rejection ratio of 80dB at 10kHz as an example to illustrate an LDO design example.

Power Supply Rejection

In real applications, non-ideal components and parasitic capacitances can change the ideal rejection characteristics of a linear regulator. Figure 1 shows some of the significant defects that change or degrade the rejection capabilities of the circuit.

Figure 1: P-channel LDO showing simplified parasitic high-frequency path.

Linear Regulation

There are two indicators in the LDO data sheet that are used to describe the LDO's ability to suppress input voltage noise, etc., namely linear regulation and power supply rejection ratio (PSRR). Although they look very similar, one indicator reflects DC changes and the other reflects AC performance.

Linear regulation rate represents the ability of LDO to suppress input voltage changes. The following formula is expressed:

In practical applications, line regulation can be viewed as the percentage of the regulator output voltage VOUT per volt change in input voltage Vin. This is particularly useful when the same regulator has various output voltage trim functions.

Linear regulation is a steady-state DC parameter that is primarily determined by the open-loop gain of the regulator at zero frequency.

Power Supply Rejection Ratio

This specification measures the regulator's ability to reject AC signals superimposed on the normal input DC voltage.

The power supply rejection ratio is the largest at low frequencies and starts to decrease from 1kHz to 10kHz according to the actual regulator design. Figure 2 shows the typical PSRR characteristics of the AS1358-9 150mA/300mA low-noise, high power supply rejection ratio LDO. This component still has a good PSRR value of 60dB at 100kHz.

Figure 2: Power supply rejection ratio of the AS1358-9 component.

The curve shown in Figure 2 is a combination of many dominant influences depending on the frequency of interest. At DC and close to 100Hz to 1kHz, the rejection is dominated by the open-loop gain of the bandgap reference and the regulator error amplifier. Above this range and up to about 100kHz, the rejection is dominated by the open-loop gain of the error amplifier. But above 100kHz, the power supply rejection ratio is dominated by the output capacitor, parasitic components, and any leakage current on the pass transistor and the package. Figure 1 shows these components.

If additional power supply rejection is required for frequencies above 100kHz (which is usually required), an external pre-filter network must be connected to the input to enhance the LDO's rejection performance.

External Network

In practical applications, only two pre-filtering methods are worth considering because excessive power dissipation in the additional components must be prevented while maintaining regulator stability.

Figure 3: Connecting LDOs in series produces very high PSRR.

Figure 4: External input network provides additional rejection.

Method 1 - Add a linear regulator. This method is very simple, takes up only a small amount of PCB area (for example, the AS1358-9 requires two TSOT23-5 packages), and has the shortest design time compared to other methods. Connecting two linear regulators in series can double the PSRR at any frequency point (assuming that the two regulators are exactly the same). The disadvantage of this method is that the voltage drop will be doubled and an additional capacitor is required. The typical voltage drop after two AS1359s in series is 280mV at a load current of 300mA, and the rejection ratio at 100kHz is 120dB. To achieve this level, the layout of the components and the PCB routing must be carefully handled.

From a practical point of view, a voltage drop of 350mV to 400mV should be allowed on each LDO. The output voltage range of the AS1358-9 LDO regulator is 1.5V to 4.5V, and the adjustment step is 50mV, so special voltages are not a problem.

Method 2 - Load the input with an LC filter based on a uniform dissipation network. The three-pole Butterworth characteristic requires a low value coil in series with two capacitors, one of which is typically located at the LDO input. The three-pole Butterworth response provides an additional 40dB of rejection at 4.5Fo, where Fo is the -3dB point (see Figure 5).

Figure 5: Butterworth stopband attenuation for different orders N.

The additional filter network does not add significant DC impedance losses compared to method 1. However, special care must be taken during design to ensure that the selected inductor can support the required DC current without saturation. The Butterworth characteristic is very useful because the passband is extremely flat, unlike the Chebyshev characteristic, which sacrifices passband and stopband ripple for better attenuation. Figure 7 shows the attenuation characteristics of Butterworth filters with stages between 2 and 10.

Figure 6 presents component values ​​normalized to a 1Ω source impedance and 1 rad/s frequency. Note that the filter output is not terminated with a terminating resistor, which would allow it to be connected to the high input impedance of the linear regulator. Column D includes the losses due to non-ideal components and indicates the passband losses. For power supply filtering, it is not necessary to strictly comply with the Butterworth characteristic; after all, the filter has only small losses at dc.

Figure 6a: Three-pole Butterworth unity dissipation normalized to 1Ω and 1rad/s.

Figure 6b: Three-pole Butterworth uniform dissipative filter.

The following expression is used to denormalize the values ​​in Figure 8a:

For power supply applications, the actual source impedance chosen is RACTUAL = 0.1Ω. If C2 is fixed to 1μF (AS1358-9), then w and a must be chosen iteratively until they are close to commercial component values. Passband loss is not a major issue, but additional AC attenuation is very important in this application.

Assuming C3 = 1μF, F-3dB = 1MHz (Calc 1.082), RACTUAL = 0.1Ω, then C1 = 1.5μF (Calc 1.47), L2 = 38nH (D = 0.4, a = 6.82dB). Suitable coils can be selected from Coilcraft's Mini Spring series (B09TJLC) or Midi Spring series (1812SMS-39NJLC). As long as the parasitic inductance of the ceramic capacitors (C1 & C3) is less than 1nH, the filter has sufficient attenuation.

Conclusion

The AS1358-9 LDO has good noise and power supply rejection performance. Additional high-frequency power supply rejection ratio performance can be achieved by adding a simple LC network at the input.