Structural Design and Research of Stacked-Gate MOSFETs

Through analysis and design, a new type of stacked gate MOSFET is proposed. Its gate capacitor is composed of two capacitors in series, so it has a smaller gate capacitance and significantly suppresses the short channel effect. The simulation results of the simulation software MEDICI verify the prediction of the theoretical analysis, indicating that the structure can be used in the RF field.

Keywords: stacked-gate MOSFET; threshold voltage; gate oxide capacitance; short-channel effect

0 Introduction

Although microelectronics has made great progress in compound and new element semiconductor materials and circuit technology, its material components and integrated circuits are still far from being able to become mainstream technology. So far, there is no new technology that can replace silicon-based microelectronics technology . At least in the first half of the 21st century, silicon-based CMOS process technology will still be the mainstream of microelectronics. Therefore, research on silicon-based CMOS devices with new structures and new processes is still the main direction of efforts to improve integrated circuits . In the past decade, people have made many progresses in these areas. Channel engineering, ultra-shallow junction technology, and gate engineering technology have continuously expanded the scope of application of CMOS devices, and a series of new structures of MOSFET have been developed.

Theoretical research on new gate structure transistors can be traced back to 1967, and at the same time, people were also studying the characteristics of bulk silicon MOSFET. Since 1980, a large number of bulk silicon MOSFETs with different structures have been proposed and developed, such as SOI MOSFET and dual-gate MOSFET.

This paper proposes a new type of stacked-gate MOSFET based on the gate engineering principle. The following is divided into two parts to describe its structure and characteristics. First, the device structure and advantages of the stacked-gate MOSFET are described; then the gate oxide capacitance and threshold voltage of the stacked-gate MOSFET are introduced as the channel length L changes, and the theoretical analysis is verified by simulation. The results show that the stacked-gate MOSFET has a smaller gate capacitance and short channel effect, and these two results are exactly what the RF circuit is happy to accept.

1 Device Structure

FIG1 is a schematic diagram of the structure of the proposed stacked-gate MOSFET, which can be connected in a variety of ways. As can be seen from FIG1, the first gate G1 and the second gate G2 of the stacked-gate MOSFET partially overlap, the first gate is made of N+ type polysilicon (work function φG1=4.17eV), and the second gate is made of P+ polysilicon with a higher work function (work function φG2=5.25eV). There are many ways to connect the gates, and here both gates are connected to the same voltage, so the total gate capacitance is mixed.

This structure has many advantages. Electrons in traditional MOSFET generally enter the channel at a low initial velocity, slowly accelerate in the process of moving to the drain end, and reach the maximum drift velocity of electrons at the drain end. Therefore, electrons move very fast at the drain end, but at a lower speed at the source end. The device speed is mainly limited by the lower electron movement speed at the source end, and its field strength distribution is uneven. Carriers in the channel region will only be greatly accelerated near the drain end. In this way, the acceleration area is small, and hot carrier injection is easily formed at the drain end. At the same time, the device will also produce DIBL effect and short channel effect under low drain voltage. The electric field distribution in the stacked gate MOSFET channel is different from that of ordinary MOS. In the middle of the channel, due to the influence of the two gate mutation interfaces, the channel electric field distribution is uneven, and there is a peak value at the interface. The source end electrons are accelerated by this peak electric field and present a larger average velocity. At the same time, the electric field distribution is more uniform. In this way, the average velocity of electrons in the channel increases, the mobility is improved, and its cutoff frequency and driving ability are increased, which increases the transconductance gm. Moreover, the peak electric field at the drain end decreases, which reduces the short channel effect, reduces hot carrier injection, and increases the breakdown voltage.

As for the gate capacitance, since the new structure gate is composed of two partially overlapping capacitors, the gate capacitance is a mixed connection, and its value is smaller than the gate capacitance of the single gate structure, thereby improving the power gain and the maximum operating frequency. The structural advantages make the device have a large transconductance, a high cutoff frequency, a small short channel effect, a smooth IV curve, and a large output resistance , which can be used in RF circuits. This article will analyze its threshold voltage and gate intrinsic capacitance, and other characteristics will be introduced in another article.

2 Characteristic simulation

2.1 Threshold voltage characteristics

First, we simulated the threshold voltage of stacked-gate MOSFET and single-gate MOSFET using simulation software MEDICI, and compared the simulation results to show the threshold voltage characteristics of different channel lengths and the rate of change of threshold voltage. The two structures used have the same parameters (such as channel doping, source and drain conditions, channel length, etc.) except for the gate structure. The specific doping values ​​are shown in Table 1.

In order to simulate its threshold voltage characteristics, the source terminal and substrate are grounded, a small voltage VDS=0.10V is applied to the drain terminal, the thickness of the single gate oxide layer is tox=2.0×10-6cm, and the thickness of the two gate oxide layers of the stacked gate is tox=2.0×10-6cm. The simulation results are shown in Figure 2.

Then use MEDICI to extract the values ​​of the respective threshold voltages in Figure 2, see Table 2. In Table 2, we can see that VT(stack)>VT under the same conditions. At this time, it should be noted that when the channel is reduced to 0.1μm, the single-gate NMOS has no threshold voltage due to the short channel effect, and the MOSFET has lost its effect, while the stacked-gate MOSFET maintains a more reasonable threshold value, which has proved that the stacked-gate structure can effectively suppress the short channel effect. In order to compare the threshold voltage change rate of the two structures, the threshold voltage VT(stack) of the stacked-gate NMOS can be adjusted to make it equal to the threshold voltage VT of the single-gate NMOS in the case of a long channel, and then compare the change rate of the threshold voltage of the two structures with the channel length. By reducing the channel doping concentration of the stacked-gate structure, we can obtain the same threshold voltage of the two structures in the case of a long channel. In actual situations, when the channel doping of the stacked-gate MOSFET is reduced to 2×1016/cm3, the above results can be obtained. The simulation results are shown in Figure 3.

Similarly, the case of single-gate NMOS with the same threshold voltage is extracted, and the extracted values ​​of the two are compared, as shown in Figure 4. Obviously, when the channel length is less than 0.5μm, the threshold voltage change rate of the stacked-gate MOSFET is smaller than that of the single-gate MOSFET, and the ability to suppress the short channel effect is also much greater.

2.2 Capacitance characteristics

As for stacked-gate MOSFET, its gate capacitance is the capacitance of G1 and G2 mixed in series, so the calculation method of single-gate MOSFET gate capacitance cannot be used to calculate the stacked-gate structure. Note that the two structures of MOSFET have the same parameters except for the gate structure. We can use the unit gate oxide capacitance Cox of single-gate MOSFET to solve the gate oxide capacitance of the stacked-gate structure.

The threshold expression of a single-gate long-channel MOSFET is shown in equation (1):

The difference between the threshold voltage of stacked-gate MOSFET and the threshold voltage of single-gate NMOS. In this way, we get the expression of gate oxide capacitance per unit area of ​​stacked-gate MOSFET.

The doping concentration in Table 1 is used for the solution, and the simulation results in Table 2 are used. When calculating the specific value, we take the long channel △VT (L=1.6μm) in Table 2, and we get △VT=1.08V. Under the condition of long channel, the gate oxide capacitance per unit area of ​​single-gate NMOS is gate oxide thickness tox=2.0×10-6cm (consistent with the value used in the simulation), so we can get

Compared with ordinary single-gate NMOS, it is reduced by 27%, and the simulation results are basically consistent with the calculated values.

3 Conclusion

This paper proposes the basic structure of partially stacked-gate MOSFETs, analyzes their advantages in terms of gate capacitance, parasitic capacitance, and significant suppression of short channel effects. Then, the theoretical analysis results are verified by MEDICI simulation, which shows the superiority of stacked-gate MOSFETs, which can be used as MOSFETs in RF circuits.