Strategies for controlling high step-down ratios of buck regulators

Many older monolithic step-down switching regulators employ on-chip feedback loop compensation. While this makes for a very simple design flow, it does not usually allow optimization of the loop dynamics. The result is that the power path components need to be selected to fit the requirements of the feedback loop, which is generally a suboptimal arrangement. For example, a given regulator may require the user to select the inductor and output capacitor within a given range to ensure that the LC double pole frequency occurs where the feedback compensation circuit has a double zero. Although you may obtain a stable loop, you may not have near ideal values ​​that meet the power path requirements.

The solution is to rely on external, user-selected loop compensation. However, that can be problematic for new users. Feedback loops were considered difficult to compensate! One of the first innovations introduced in the 1980s was the use of current mode control . That control configuration reduced the order of the output filter by one order, implementing it with a first order filter system, greatly simplifying the loop compensation design task. However, current mode control was not the panacea that was initially hoped for. Noise sensitivity was a major issue.

A recently developed version of current mode control, called emulated current mode control (ECM), has greatly improved the ability to operate at very high step-down ratios while maintaining good noise immunity. As a result, for input voltage ratings up to 75V, it is possible to have a large design margin in many high input voltage applications while still being able to produce the kind of output voltages used in today's digital circuits. Loop compensation becomes a relatively simple design, and readily available software can make the design almost trivial from the user's point of view.

Conventional Current Mode Basics

So, first of all, how does current mode control work? People have tried to use complex mathematical formulas to explain how current mode control works. However, I have always believed that if you have to use mathematics to explain something, it is because you don't understand it. So let's see if we can develop a simple intuitive method to understand current mode control.

The basic concept is to convert the power stage into a current source, where the level of the controlled current is controlled by an error amplifier. The error amplifier monitors the output voltage and controls the current based on the deviation of the output voltage from its ideal value. A common method of controlling the inductor current is to measure this current and turn off the high-side FET (control FET) when this current reaches the desired current value.

From the point of view of the output filter—which consists of a capacitor connected in parallel with a load resistor —the inductor behaves like a programmable current source. Any small signal deviation in the error amplifier output will result in a small signal current change through the inductor. These small signal current changes flow through the impedance of the output filter network, resulting in small changes in voltage at the output. Because the output RC filter is a first-order system, the control of the output small signal response (also called the settling gain) is also first-order. Therefore, the system is very easy to get into a stable state.

ECM Basics

Most conventional current-mode regulators measure the inductor current by monitoring the on-state current of the control FET—ECM—and, on the other hand, measuring the current in the catch diode just before turning the control FET on again. This information is then captured by a sample-and-hold circuit that is gated by the regulator's onboard clock.

The diode current information is held, and then the control FET is turned on. Next, a small current source starts charging the ramp capacitor , whose value has been chosen to be proportional to the value of the inductor. The charging current is programmed to be proportional to the input-output voltage difference. Because of this, the ramp voltage generated on this capacitor has a slope proportional to the inductor current ramp.

Figure 1: Simulated current-mode control block diagram.

When the ramp voltage is then superimposed on the previously sampled current measurement, the result is a trapezoidal waveform that looks a lot like the current waveform controlling the FET, minus all the usual non-idealities. This gives the ECM the ability to accurately control the switching of very narrow pulses, a very desirable feature for high step-down ratio regulators. However, the question remains, is the small signal behavior still what is expected from a current mode regulator? In fact, the measurement plots below show that it clearly is.

Figure 2: Diagram of ECM signaling behavior.

It is interesting to note that with a clean, wide operating range, single-pole control architecture, the end user has the flexibility to take advantage of this easy compensation feature. The user can implement very simple, explicit pole compensation with a zero at about 300Hz. The design allows the crossover frequency to occur somewhere from 1kHz to 30kHz because it is a simple RC compensation. It is the forgiving nature of the control architecture that keeps the loop design simple.

Reduce ECM to a realistic level

The LM5576 family of SIMPLE SWITCHER step-down regulators takes advantage of this simple compensation feature to return a degree of control to the user through achievable loop compensation. In contrast, previous versions of SIMPLE SWITCHER regulators relied entirely on internal, factory pre-programmed gain characteristics.

Of course, to truly take advantage of the flexibility of loop gain, the operating frequency should also be flexible. This allows the user to make performance tradeoffs between efficiency, solution size, and dynamic performance. For example, if the user requires excellent dynamic performance, but efficiency is a secondary consideration, the designer can choose to run at a higher clock frequency, thereby minimizing the energy stored in the LC filter and allowing for better transient response.

Conversely, for applications that optimize efficiency at the expense of some board space, the user can choose a lower clock frequency and the associated larger LC filter. Dynamic performance will be compromised due to the greater energy stored in the filter element. However, in either case, the loop can be easily tailored to the selected LC filter components and clock frequency. For systems with significant levels of dynamic loading, a faster control loop allows for reduced output capacitance, thereby saving cost in the overall design.

In an effort to minimize the design workload on the user's part, the entire regulator can be designed using the fully automated, well-known expert system WEBENCH. The software will generate various designs that are indeed stable and achieve the expected function. However, the software is not yet smart enough to design the dynamic performance of the regulator to the best by itself, and a small amount of user intervention is still required. For most applications, that is unnecessary.

However, for those situations where a little extra bandwidth is needed in the control loop, the user has the option of adjusting the compensation. The results of various transient simulations can be viewed as Bode plots of the overall loop gain, and the compensation selected by the software can be adjusted in an effort to improve the dynamic performance of the loop. The user is free to push the loop bandwidth well above the high frequency poles that the factory begins to show in the transfer function, so the loop bandwidth can be extended with a slight sacrifice of phase margin, while transient dynamic performance is substantially improved.

To force the loop into a stable state, there is essentially no limit on the values ​​of the inductor and output capacitor. In the example below, the switching frequency is increased to 500KHz, allowing the inductor to be 15uH and the capacitor to be 220uF. The result is a large load step response that looks quite good compared to a simple, monolithic regulator.

Figure 3: Example of large load step response.