Designing power converters is challenging, primarily because of limited board space. To reduce the size of the converter, the frequency must be increased. This allows for the use of smaller components. By increasing the switching frequency and making the converter physically smaller, the overall efficiency requirements increase.
As the output voltage decreases, the power level increases, allowing the load to run faster, which results in higher output current. When the load changes dynamically at higher frequencies, the control loop must remain constant. Even with all these space-saving features, there are other challenges in the design of power converters going forward.
One of the challenges is the control loop. To handle higher load dynamics and take advantage of smaller components, a faster control loop is needed. For slower switching frequencies in the past, the 3kHz range was good enough, but as switching frequencies increase above 200kHz, designers will need to cross over the 0dB gain point at a much larger frequency than the 3kHz range. For the worst-case line and load conditions, the upper limit of a 200kHz supply (according to acceptable theoretical values) is 40kHz.
Crossing 0dB gain at this relatively high frequency allows designers to use smaller output capacitors , even with higher dynamic load changes. This is because the converter responds faster as gain crossover increases, and the output capacitors do not need to hold the voltage as long during load transients. The control circuitry adjusts the delivered power to compensate and control the output voltage, and does not rely on the output capacitors to control load or line transients. In addition, the magnetic components shrink as the switching frequency increases, saving even more space.
Of course, there are some disadvantages. When using traditional circuits, switching losses increase, but better designed components have greatly reduced switching losses.
Using a quasi-resonant topology, such as a phase-shifted full-bridge topology with a controller like the UCC3895, can help reduce switching losses. In many designs, the benefits of synchronous switching on the secondary side are significant.
Magnetics, switches , and output capacitance all affect the control gain to the output as a function of frequency. Feedback control has its own challenges, and the parasitic capacitance of the feedback circuit is an even more important factor.
At these higher frequencies, parasitic capacitance becomes a problem. When switching at low frequencies, the 0dB crossover is around 5kHz or less, and parasitic capacitance in the feedback loop is mostly configuration dependent. However, when designing for 30kHz crossover, other factors become problematic, one of which is the subject of this article.
I recently encountered this particular problem on a converter that was running at 400kHz and was a phase-shifted design using a control IC (UCC3895) on the primary side and sensed outputs on the secondary side.
The designer used an optocoupler to cross the primary to secondary isolation barrier and everything seemed to be in place at first, however, the loop became unstable for some reason and the output oscillated at a low level while maintaining the DC set point.
Of course our designer checked the calculations but didn’t see anything obvious. Then the designer set the converter to be stable in the DC state with AC ripples and started exploring the circuit.
After a lengthy struggle, it was discovered that while the error amplifier on the secondary side did reproduce the ripple that appeared at the converter output with the correct 180 degree phase shift, the signal from the optocoupler was shifted by about 45 degrees from the expected phase at a frequency of about 35 kHz. This was enough to remove the phase margin of the crossover, resulting in the observed oscillations. Figure 1 shows the three waveforms.
Figure 1 shows the phase shift through the optocoupler
The optocoupler datasheet does not mention this phase shift, but finding this effect reminded the designer that optocouplers create a pole at higher frequencies. After reviewing the datasheets for different optocouplers, no mention of phase shift as a function of frequency was found. Further investigation was conducted and a test circuit was built to examine the gain vs. phase relationship across the optocoupler. Figure 2 shows this circuit, with the data measured using a network analyzer.
Figure 2. Test circuit used to obtain the gain and phase through the optocoupler under test.
The designer performed the first test using the circuit shown in Figure 2 and then plotted the phase and gain across the resistors versus frequency. Figure 3 shows the results of the test using 4.3 volts at the adjustable DC source . The designer used the voltage across R1 and R2 to establish these phase shifts.
Figure 3 Phase and gain of the optocoupler circuit under test versus frequency
When the phase shift is 45 degrees and the gain is reduced by 3dB, the frequency of the pole is about 35kHz, which explains the phenomenon observed before. This coupler also has other complex poles and zeros outside the frequency of our concern, but they are not related to this analysis, so they are ignored.
The designer increased the DC voltage of the test circuit to 11 V and repeated the measurement with similar results. The pole did not change significantly with increasing current through the optocoupler.
Figure 4. Phase/gain test of optocoupler at higher currents
The designer then tried to add a 1.2nF capacitor to the 4kΩ resistor to compensate for the pole. The designer repeated the same test at two current levels in sequence, and this produced a zero at 35kHz that helped compensate for the optocoupler pole.
Figure 5. Result of adding a zero at 35 kHz
In both cases, this effectively moves the phase shift so that it crosses the 135 degree phase shift point above 100kHz and maintains a gain of more than 3dB above 200kHz.
The designers then tried the same procedure with the power converter and then added a zero in the converter’s optocoupler circuit to make the optocoupler stable over the entire line and load range.
in conclusion
If the designer plans to use an optocoupler in a closed feedback loop with a frequency exceeding 8kHz and a 0dB crossover, the optocoupler must be tested first to understand the phase and gain characteristics. If a network analyzer is not available, a simple circuit can be made as shown in Figure 6. This helps the designer identify the phase and gain with simple components, a variable frequency signal generator with DC offset function, and a power supply.
By injecting a constant amplitude AC current signal into the LED (voltage measured across R1) and measuring the current out of the phototransistor (voltage across R2), the location of the pole can be understood by the amplitude and relative phase of the current out of the phototransistor. At low frequencies, the CTR will cause a current difference, but as the frequency increases, the current through the transistor will decrease. The pole frequency can be identified by increasing the AC signal frequency to the point where the phototransistor AC signal amplitude is half of its previous value. With this information, it is possible to calculate what components are needed to add a zero in the feedback loop.
Figure 6 Test circuit diagram
If these results show an unwanted pole at frequencies within the circuit's operating range before the 0dB crossover, then adding a zero in series with the LED circuit can compensate and retest the optocoupler. Of course, this final test is done with the converter in operation.
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