Universal gate driver IC for IGBT and power MOSFET-EEWORLD

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1　引言
scale-2芯片组是专门为适应当今igbt与功率mosfet栅驱动器的功能需求而设计的。这些需求包括：可扩展的分离式开通与关断门级电流通路;功率半导体器件在关断时的输出电压可以为有源箝位提供支持;多电平变换器与并联功率器件的专业控制功能的兼容性;可以选择使用低成本的双向信号的变压器接口或抗电磁干扰光纤接口;可扩展设置，并具备故障管理;次级故障信号输入/输出，3.3v到15v的逻辑兼容性。
在延伸漏极双井双栅氧cmos制造工艺中使用了这个芯片组，它包括几个不尽相同的次级智能门级驱动（igd）asic和一个初级逻辑驱动插口（ldi）asic。
2　集成的栅驱动器核心

Figure 1 shows a micrograph of the prototype gate driver ASIC. Its active area is approximately:
4 mm × 2 mm. The conventional package is a SOIC-16 with dual wire bonds on the high current interface. Different bonding methods are used to control the specialized functions of different standard products at very low cost, including the option of using a bidirectional signal transformer interface or a bidirectional optical fiber interface. This highly integrated gate driver core includes an output driver stage with an output current and a discharge current of 5.5 A, while supporting direct drive of external N-type MOSFETs, which can easily scale up the gate power and gate current to 20 W and 20 A respectively or even more. The half-bridge push-pull output stage allows for low-cost expansion, parallel connection of several gate drivers and controllability of operation independent of the turn-off gate-emitter voltage.
Advanced control functions and customer-specific options can be achieved by pre-programming complex signal units and simple devices (such as analog comparators, logic gates, CMOS transistors, interfaces) on a programmable single mask, enabling the shortest time to market at a competitive price.

The primary logic driver socket (LDI) ASIC implements a dual-channel bidirectional transformer interface, a scalable DC-DC converter with a dedicated startup sequence, and has scalable settings and fault management functions. Figure 2 shows a micrograph of a prototype logic driver socket ASIC, with an active area of approximately 4 mm × 2 mm and a conventional SOIC-16 package.
In order to improve the short-circuit resistance of IGBTs, their gate-emitter voltage is generally limited to less than +15 V during the turn-on process and the on-state. Since the threshold gate voltage of recent IGBTs has exceeded 3 V, it is sufficient to set the gate-emitter voltage to 0 V during the turn-off process and the off-state. This is a common practice for intelligent power modules (IPMs) that integrate the gate driver directly into the power module. Compared with these small IPMs, today's conventional large IGBT modules with more than 36 parallel IGBT chips have increased resistance caused by the gate interconnection wires and collector-gate transfer capacitance, which will have a serious impact on its turn-off speed, noise immunity, and especially the possibility of local false turn-on due to transient voltages. To reduce these effects, the gate-emitter turn-off voltage is usually set to -5V-15V.
Therefore, in the first working mode, IGDASIC can provide a regulated +15V gate-emitter voltage to the turn-on state as the supply voltage of the entire gate driver by adjusting the emitter voltage at the "VEE" pin (see Figure 3), with a measurement accuracy of ±450mv, a process deviation within 3σ, and a temperature range of 400℃-1250℃. The drive DC current must be limited to less than 2.8mA, so that external components can control the gate-emitter voltage to set the value required by the user.