3V/5V low power consumption synchronous voltage and frequency conversion chip AD7740

    Abstract: AD7740 is a CMOS low-power single-channel single-terminal synchronous voltage-frequency conversion chip. It has two modes: buffered and non-buffered. The operating range is wide, the requirements for external components are small, the output frequency is accurate, and no adjustment or calibration is required. It can be widely used in various A/D conversion systems, and can be used with the AD22100S temperature sensor to form digital ambient temperature indicator circuits. This article introduces the structure, characteristics, functions, principles and several typical application circuits of AD7740.

1 Overview

AD7740 is a low-cost, ultra-small synchronous voltage-frequency conversion chip (VFC). The operating voltage range of the chip is 3.0~3.6 or 4.75~5.25V; the operating current is 0.9mA. AD7740 is available in 8-pin SOT-23 and 8-pin small SOIC packages. Small size, low cost and ease of use are the main design ideas of this chip. The chip also integrates a 2.5V bandgap reference internally, and users can also use an external reference. The maximum external reference is VDD.

The output frequency of the AD7740 chip is synchronized with the CLKIN clock signal. The clock signal can be generated by an additional external crystal oscillator (or resonator) or can be provided by a CMOS-compatible clock signal source. The full-scale input frequency of the AD7740 is 1MHz.

When the analog signal changes from 0V to VREF, the output frequency of the AD7740 can change between 10%-90%fCLKIN. In buffered mode, the input impedance of this chip is very high. At this time, the input voltage of its VIN pin is 0.1V~VDD-0.2V. In non-buffered mode, the allowed input voltage of the VIN pin is -0.15~VDD+0.15V. The two modes can be converted to each other through the BUF pin.

The operating temperature range of AD7740 (Y grade) is -40~+105℃. The operating temperature range of AD7740 (K grade) is 0~85℃. In addition, AD7740 also has the following features:

●Contains a single-channel single-terminal two-step voltage-frequency converter;

●Using two packages: 8-pin SOT-23 and 8-pin small SOIC;

●Contains 2.5V reference voltage;

●The voltage reference rated range of REFIN terminal is 2.5V～VDD;

●The maximum input frequency is 1MHz;

●With optional unbuffered input and high-impedance buffered input;

●In non-buffered mode, the operating voltage of AD7740 is 3.0~3.6V or 4.75~5.25V, the operating current is 0.9mA, and the minimum power consumption is 3mW (typical value);

●During bipolar operation, the analog input can be reduced to below -150mV;

●The requirements for external components are small, and no external resistors or capacitors are needed to set the output frequency. The full-scale output frequency is determined by a crystal or clock, and no adjustment or calibration is required;

●Has automatic power-off function;

●No need for charge pump to achieve true -150mV capability.

2 pin function

Figure 1 is the pin arrangement of AD7740, and Table 1 is the pin function description of AD7740 (taking an 8-pin small SOIC package as an example).

Table 1 AD7740 pin function description

3 Functional principles

The AD7740 is a CMOS-type synchronous voltage-frequency converter (VFC) using charge balance conversion technology. The input voltage signal is converted into a set of output pulse trains by a dedicated front-end pseudo-modulator.

The AD7740 operates from a single power supply, either 3.3V or 5V. Figure 2 shows its logic block diagram.

3.1 Input amplification buffer and voltage range

The analog input VIN can work in the buffer mode through the device BUF=1. In the buffer mode, VIN has a high impedance characteristic, with a typical value of 100MΩ. This characteristic allows the AD7740 chip to withstand high impedance input, and the voltage range of the VIN pin is 0.1V. ~VDD-0.2V. By setting BUF=0, the AD7740 can input an analog signal lower than GND at the input loop, with a range of -0.15~VDD+0.15V. In this mode, the typical input impedance of the AD7740 is 50kΩ.

The conversion function relationship of AD7740 is:

f OUT =0.1f CLKIN +0.8(V IN /V REF )f CLKIN

Figure 3 is the function relationship curve in non-buffering mode:

3.2 VFC modulator

The analog input signal of the AD7740 is continuously sampled through a switched capacitor modulator, and its sampling frequency can be adjusted by setting the main clock frequency. The input signal can be buffered by an on-chip buffer before being fed into the modulator sampling capacitor. This isolates the sampling capacitor charging current from the analog input.

This system is a negative feedback loop that ensures that the net charge on the integrator capacitor is 0 by balancing the charge on the input voltage input with the charge on the VREF input.

Digital information representing the analog input voltage is contained within the duty cycle of the pulse train at the comparator output. The frequency of the output pulse train depends on the analog input signal. If it is a full-scale input, the output frequency is 0.9fCLKIN, and a zero-scale input is 0.1fCLKIN. In this way, the output signal can be connected to the optocoupler simply and conveniently. The pulse width of FOUT is determined by the high-level duration of the CLKIN signal, and its typical value is 35ns. Figure 4 is a waveform diagram of the output frequency.

There is a set adjustment time in the AD7740 to adapt to changes in input voltage. It should be noted that the adjustment must end before the signal containing valid data arrives. The adjustment time is usually 2 CLKIN cycles.

3.3 Clock

Unlike an asynchronous VFC, the AD7740 relies on the stability of an external capacitor to set its full-scale frequency, and uses an external clock to determine its full-scale output frequency. This feature allows the AD7740 to have a more stable conversion function, and designers can measure system stability and errors based on the selected external clock.

The main clock input (CLKIN pin) of the AD7740 can be input by an external CMOS compatible clock signal (CLKOUT is not required).

When the frequency is greater than 50kHz, a crystal resonator can be connected between CLKIN and CLKOUT.

When a crystal resonator is connected between CLKIN and CLKOUT to generate a clock, the VDD pull current of the AD7740 is larger than when the driving clock signal of the CLKIN pin is used. This is because the on-chip crystal is active when a crystal or resonator is used.

The on-chip crystal oscillator has an initialization time. When VDD=5V, the typical value is 10ms; when VDD=3.3V, the typical value is 15ms (both are connected to a 1MHz crystal).

The AD7740 main clock signal will be reversed at the CLKOUT pin, and it is recommended to use a CMOS load. If a crystal oscillator is used to generate the AD7740 clock signal, the user may want it to be used as the clock for the entire system. In this application, it is best to let the CLKOUT signal be buffered by a CMOS buffer before being sent to other parts of the circuit.

3.4 Input benchmark

The conversion performed by the AD7740 depends on the voltage reference applied. This reference can be an internal 2.5V bandgap reference or an external clock when REFIN/OUT is left floating. When selecting an external reference, its drive capability, initial error, noise, and drift characteristics should be considered. AD780 and REF192 are more suitable choices.

For radiatively measurable signal sources, it is best to use an internal clock. When the signal source changes with time, temperature, load and other factors, the internal clock should also be used to eliminate errors.

3.5 Power saving state

When the CLKIN pin is idle for more than 1ms (typical value), the AD7740 automatically enters the power saving state. In the power saving state, most of the digital/analog circuits are turned off, REOUT is suspended, and FOUT is at a high level. At this time, the power consumption is only 525μW (5V) or 360μW (3.3V).

4 Typical applications

Figure 5 shows the basic wiring diagram of the AD7740 in unbuffered mode. The 5V power supply serves as the reference for the AD7740, and the quartz crystal oscillator is used to provide the clock signal to the chip. To ensure that the crystal does not oscillate beyond its basic resonant frequency, capacitors C1 and C2 need to be connected to the crystal.

4.1 A/D conversion

In an A/D conversion system, a typical application of the AD7740 is to count the output pulses of FOUT and form a fixed time interval. As shown in Figure 4. This fixed gate period can be generated by dividing the input signal frequency. In this application, the key is the ratio of the FOUT frequency to the signal, not the absolute frequency of FOUT. The frequency division function is implemented through a binary counter, and CLKIN is the counting pulse.

Figure 7 shows the waveforms of CLKIN, FOUT and gate signals. During the high level period of the gate signal, the counting pulse counts the rising edges of FOUT. Since the gate period is not synchronized with FOUT, the count may be inaccurate. Therefore, relying on FOUT counting may produce counting errors.

Because TGTAEFOUTMAX = total number of full-scale counts, the fastest slew rate for a DAC for a given resolution can be measured by the highest frequency of CLKIN.

If the output frequency is determined by gate pulse counts derived from the clock signal, then clock stability is not important and the AD7740 only functions as a voltage-to-frequency conversion driver. Due to the inherent monotonic conversion capability and the broadband nature of the input clock frequency, the AD7740 has better conversion time and resolution in special applications.

Gate period is another important parameter to consider. Because the integration period of VFC is equal to the gate period, all interference signals can be eliminated by calculating the integer number of interference signal periods. For example, if the gate period is 100ms, interference signals of 50Hz and 60Hz will be suppressed in the normal way.

4.2 Isolation circuit

The AD7740 can also be used to isolate analog signals. Sometimes it is necessary to isolate the AD7740 from any other control loop due to noise, safety requirements, or distance. This is easily accomplished using an opto-isolator. But it is very necessary to add a ground loop between the AD7740 and other devices.

The transmitted analog voltage signal can be converted into a pulse train through the VFC, and then the optical isolator uses light as the connection medium to couple the pulse train and pass through an isolation barrier. The input light-emitting diode (LED) of the isolator is driven by the output of the AD7740. At the receiving end, the output transistor operates in phototransistor mode. The pulse train can then be restored to an analog voltage by a voltage-to-frequency converter, or it can be fed into a counter to generate a digital signal. The analog and digital portions of the AD7740 allow single-terminal power supply operation, which simplifies isolation from the power supply.

Figure 8 shows a VFC isolation circuit using low-cost optical isolators. The 5V supply serves as both isolator (Vm) and local (Vcc) supplies.

4.3 Temperature sensor

    AD7740 can form a digital ambient temperature indicator with the AD22100S temperature sensor. The output voltage of the AD22100S is proportional to temperature. The power supply voltage of this core is 5V, the output voltage is between 0.25V and 4.75V, and the corresponding temperature range is -50℃~+150℃. After inputting the output voltage to the AD7740, the temperature value can be converted into a digital pulse train. The specific circuit is shown in Figure 9.

This is an extremely economical solution. If the 5V power supply is used as the reference voltage for both VFC and AD22100S, the external precise reference can be omitted.

4.4 Power supply bypass and ground circuits

In circuits with relatively high accuracy requirements, careful consideration should be given to the wiring of the power supply circuit and ground return, which will help ensure calibration performance. In the printed board circuit design of the fixed AD7740, the analog and digital parts should be separated and limited within a certain range. To minimize coupling capacitance between the analog and digital sections, the analog and digital grounds should be connected to ground at a point close to the AD7740 and should not overlap. Also, avoid running digital lines under the chip to avoid coupling noise onto the chip. The analog ground should be arranged under the AD7740 to avoid noise coupling. Power supply circuits should use wider wiring to reduce circuit impedance and the effects of low-frequency interference. For rapidly changing signals, such as clock signals, a digital ground shield should be used to avoid radiated noise coupling into other parts of the circuit, and clock signals should never be routed close to the analog input section to avoid overlap of digital and analog signals. It is best to use microstrip technology. The ground wire should be placed on the component side and the signal line should be placed on the welding side.

It should also be pointed out that effective decoupling is also important and all analog circuits should be decoupled between ground. This circuit uses two chip capacitors of 10μFt and 1μF, and they should be placed as close to the chip as possible, ideally right above the chip. The bypass capacitor leads should be as short as possible to minimize the inductance of the capacitor leads. The 10μF capacitor should be a tantalum capacitor and placed close to VFC to reduce low-frequency interference. The 0.1μF capacitor should have low series resistance (ESR) and effective series inductance (ESI). Ordinary ceramic capacitors can be used. This capacitor can provide a path to ground when operating at high frequencies to handle changes due to internal circuits. The resulting sudden current. In addition, a capacitor with a capacity greater than 47μF should be connected to the power access point of the PBC.