Methods for Improving Power Supply Rejection Ratio of Amplifier Circuits

In actual application circuits, noise and fluctuations are often unconsciously introduced into the power supply voltage, thus affecting the output voltage. In order to stabilize the circuit, the generated noise needs to be eliminated or suppressed. This article discusses three methods to improve the power supply rejection ratio (PSRR) of the amplifier circuit : the common source and common gate method, feedback technology, and designing additional circuits that can reduce the influence of the power supply on the output voltage gain. Through the simulation data output comparison of the three technologies, it can maintain a higher gain value, which is beneficial to the circuit design with cascade amplifiers, and the additional circuit can meet the requirements of power supply fluctuation stability.

When a circuit is actually applied, noise and fluctuations are often introduced into the power supply voltage without being noticed, thus affecting the output voltage. Therefore, in order to make the circuit stable, these noises must be eliminated or suppressed. For this reason, it is necessary to understand how the noise caused by the power supply voltage appears at the output end and how to measure and weaken these noises that affect the output.

PSRR is a quantitative term for the ability of a circuit to suppress noise from the power supply. It is defined as the ratio of the gain from the input to the output to the gain from the power supply to the output, that is,

Here, A(s) = gain from input to output = Gm×Rout; Ap(s) = gain from power supply to output = GMp×Rout.

therefore

Here, Gm is the input signal transconductance; GMp is the power supply transconductance.

1 Methods to improve PSRR

In order to reduce the impact of power supply fluctuations on the output, Gm must be increased and GMp must be reduced. Ideally, to completely eliminate the impact of power supply fluctuations, Gm should be infinite and GMp should be 0. This article introduces commingling technology, negative feedback technology and the use of additional circuits. Three methods to improve the PSRR of amplifier circuits are introduced and verified by simulation.

The negative gain from VDD to the output can reverse the power supply fluctuation and improve the PSRR, which is reflected to the output of the amplifier circuit. The common source amplifier provides support for the application of this technology, and the results have been confirmed.

2 Cascode Technology

2.1 Introduction

The cascode technique, while increasing the output impedance Rout of the amplifier, also greatly increases the gain of the amplifier circuit. However, the gain from the power supply VDD to the output is still 1, the same as the common source amplifier. Thus, the cascode technique improves the PSRR because it increases the gain from the input to the output while keeping the gain from the power supply to the output constant.

However, compared with the common source amplifier, the common source and common gate amplifier also brings the disadvantages of reduced output swing and 3 dB frequency. The reduced output swing is due to the lower Vd output swing value requirement. As the output capacity increases, the frequency point at the output end shifts to the left, resulting in a reduction in the 3 dB frequency.

2.2 Circuit

The common source circuit is shown in Figure 1. It uses a PMOS tube as a load, and the PSRR of the amplifier is estimated by the bias circuit of the load MOS tube. A 30 μA current source is used as the bias of the amplifier. The gain of this common source amplifier can be simulated to 356 with a 3 dB frequency of 5.43 MHz8. Since the gain AVDD at the power supply end is 1, the PSRR is still 356.

The multi-stage common source amplifier is shown in Figure 2, which includes common source and common gate NMOS transistors M1 and M2. The bias voltage of these transistors is generated by a mirror current source and shunted by M1. A 30μA current source is used to match the bias of the common source amplifier. Although the load device only contains a single stage of MOS and there is no cascade, the gain of the amplifier is 722, which is twice the original. However, due to the increase in output impedance, the frequency of the 3 dB point is reduced to 3.57 MHz.

2.3 Simulation results and output curves

In the common source circuit, it can be seen that AVDD = 1. This means that the fluctuation is transmitted from the power supply VDD to the output without attenuation, and it is found that PSRR = amplifier gain, so in order to increase the PSRR of the circuit, this technology tends to increase the gain of the circuit. However, the main disadvantage of this method is its low output swing, and its application is limited by low frequency, and the PSRR is low at high frequencies.

3 Negative feedback technology

3.1 Introduction

Since negative feedback ensures that the output voltage follows the input voltage, the circuit is stabilized, interference from other nodes such as the power supply is suppressed, and a lower gain from the power supply to the output is given, thereby improving the PSRR of the entire circuit.

3.2 Circuit

In order to construct a negative feedback method to improve PSRR, a common source amplifier circuit with negative feedback was simulated and compared with the common source amplifier without negative feedback simulated in Figure 1. The circuit of negative feedback is shown in Figure 5. The output voltage is sampled and controlled by M6. The current of M6 is converted into voltage through R0, and the output current and the input current of M0 are mixed. The load device is a PMOS tube, and its bias voltage is generated by a mirror circuit. In the design process, its resistance value is the key because it determines the balance between gain and PSRR value. Too large a resistance value will lose gain.

3.3 Simulation results and output curves

In the circuit using negative feedback, the AVDD value has been reduced to 0.293. Finally, the PSRR has been improved. Negative feedback forces the output voltage to the input voltage, thereby stabilizing the circuit. Therefore, it can suppress any fluctuations from other nodes like the power supply, even with a low value of gain from the power supply to the output node. So using other methods like cascode circuits, gain boosting, etc. to increase the gain of this circuit, applying the same feedback circuit will greatly improve the PSRR of the circuit with the gain.

4 Additional Circuit Method

4.1 Introduction

The additional circuit is designed to provide a negative gain path from VDD to output to eliminate the effect of power supply on output in normal circuits. Since the negative gain eliminates the effect of VDD on the output node, the GMp of the improved PSRR value is reduced.

4.2 Circuit

The common source circuit with additional circuitry is shown in Figures 7 and 8, eliminating the effect of power supply fluctuations from VDD to the output node by using a common source amplifier operating in the linear range.

Since the common source amplifier has an inverting output, the VDD fluctuation amplified by M14 obviously affects the VDD fluctuation passing through the output node transistor M3. The additional circuit method achieves a balance between the gain and the PSRR value. As the gain increases, the PSRR value decreases.

Two circuit simulations are given as shown in Figures 9 and 10, where the first one works at high gain and the corresponding PSRR is low. M14 has a threshold voltage provided by the power supply voltage VDD, which gives it a higher Vgs value, causing it to work in the linear region. The input transistor M0 works in the saturation region with very high R0 and transconductance Gm. Therefore, M14 is also driven to work in the saturation region, increasing its R0 and Gm values, although it works in the linear region. It is found that this circuit has a high overall gain and AVDD value and a very low PSRR.

In the second simulation, the input transistor M0 works in the saturation region, but at the edge of the linear region. Therefore, transistors M14 and M10 work in a deeper linear region, reducing the equivalent resistance Ra consumed by M14. As a result, the gain of the amplifier decreases, and the value of AVDD also decreases. Finally, the PSRR of the circuit completely improves the gain of the entire amplifier, and can be improved in the second-stage amplifier and maintain a high PSRR value.

4.3 Simulation results and output curves

By using an additional circuit to eliminate the influence of power supply fluctuations, the PSRR is improved. However, due to the influence of the additional circuit on the output impedance, the gain of the entire circuit still needs to be changed. From the above results, the entire circuit will achieve a balance between gain and PSRR.

However, the 3 dB frequency of this circuit is lower than that using negative feedback techniques, although the additional MOSFET increases the load capacitance at the output node, shifting the pole to the left and lowering the 3 dB frequency. Low gain and high PSRR amplifiers can be cascaded to achieve higher gains.

5 Conclusion

Although the common source and common gate technology improves the gain and PSRR of the circuit by a certain ratio, it also brings about a lower output swing and 3 dB frequency point and a higher output impedance, and is not suitable for applications requiring cascading amplifiers and higher operating frequencies. Negative feedback technology stabilizes the output while improving the PSRR of the amplifier. Although negative feedback technology reduces the gain from the power supply to the output node, such as AVDD, and increases the PSRR. However, the gain is reduced proportionally, and the B value can be reasonably adjusted to meet the gain requirements. This technology is effective for circuits operating at high frequencies. The additional circuit is a technology that can give the maximum PSRR value, and its conclusion can be seen from the simulation data output table of the three technologies, and it can maintain a higher gain value. However, it also has the disadvantage of reducing the 3 dB frequency point of the circuit because additional capacitance is introduced at the output end. Therefore, as can be seen from circuit 2 in Table 3, this circuit can achieve an extremely high PSRR value, but at the expense of very low gain. Therefore, this circuit plays an important role in the design of circuits containing cascade amplifiers, where the gain can be solved by cascading. The additional circuit can meet the requirements of power supply fluctuation stability.