S3C6410 bare metal program, LED light flashes

1 /*

2 * Realize the running light, LED1 LED2 LED3 LED4 are turned on and off in turn

3  */

4

5 .global _start

6 .section .text

7

8 _start:

9

10     /*

11      * set the CPU to SVC32 mode

12      */

13     mrs r0,cpsr

14     bic r0,r0,#0x1f        @ clear the last 5 bits

15     orr r0,r0,#0xd3        @ 0b11010011, set the svc mod, and disable fiq irq

16     msr cpsr,r0

17

18     /*

19 * flush v4 I/D cahces

20      */

21 rice r0, #0

22 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */

23     mcr p15, 0, r0, c8, c7, 0        /* flush the v4 TLB */

24

25     /*

26      * disable MMU stuff and caches

27      */

28     mrc p15, 0, r0, c1, c0, 0

29     bic    r0, r0, #0x00002300    @ clear bits 13, 9:8 (--V- --RS)

30     bic    r0, r0, #0x00000087    @ clear bits 7, 2:0 (B--- -CAM)

31     orr    r0, r0, #0x00000002    @ set bit 2 (A) Align

32     orr    r0, r0, #0x00001000    @ set bit 12 (I) I-Cache

33     mcr    p15, 0, r0, c1, c0, 0

34

35     /* peripheral port register address range set */

36     ldr r0, =0x70000000    @the base address of peripheral port is 0x70000000

37     orr r0, #0x13        @address range is 256M,  0x7000 0000 -- 0x7FFF FFFF

38     mcr p15,0,r0,c15,c2,4

39

40     /* disable the watchdog */

41     ldr r0, =0x7E004000

42     mov r1, #0

43 pp r1, [r0]

44

45     b user_program

46

47     /*

48      * LED1 <----> GPK4

49      * LED2 <----> GPK5

50      * LED3 <----> GPK6

51      * LED4 <----> GPK7

52      */

53 user_program:

54     /************** control the led ***************/

55     /* control led1 GPK4 */

56     ldr r0, =0x7F008800

57     ldr r1, =0x11110000

58     str r1, [r0]        /* set GPK4 GPK5 GPK6 GPK7 as output*/

59

60     ldr r0, =0x7F008808

61     ldr r1, [r0]

62     bic r1, #0x00F0

63

64     mov r2, #0xf

65 light_water:

66 orr r3,r1,r2,LSL #4

67 str r3, [r0]

68     bl delay

69     subs r2,r2,#1

70     moveq r2, #0xf

71     b light_water

72

73

74 delay:

75 mov r4,#0x20000

76 delay_loop:

77     subs r4,r4,#1

78     bne delay_loop

79     mov pc,lr    @return

80

81 .end