STC8G series storage structure RAM FLASH EEPROM

7 Memory

1. Data storage - RAM

Internal RAM [Take STC8A8K as an example: the lower 128 bytes are directly accessed as CODE, and the upper 128 bytes are indirectly accessed as ICODE]

Internal extended RAM [Take STC8A8K as an example: including 8192 bytes of internal XCODE]

External expansion RAM [External XCODE can be expanded to a maximum of 64KB]

2. Program storage - ROM 3. EEPROM

RAM is used to store the intermediate results and process data of program execution (the data disappears after power failure). If code stc8a8k is not added when defining a variable, it is stored in RAM by default.

Internal RAM

A total of 256 bytes, divided into 2 parts:

The lower 128 bytes of RAM [0x00H-0x7FH], of which 0x00H-0x1FH, a total of 32 bytes, are 4 register groups, which are selected by PSW RS0 RS1. 20H-2FH, a total of 16 bytes, can be directly bit-addressed. [No AND or operation]

High 128 bytes RAM [0x80H-0xFFH].

Remark:

rs0 (1 bit) rs1 (1 bit) are each one bit in PSW (8 bits), PSW is the special function register of 51 microcontroller [20220619: sfr PSW = 0xd0; //Program status word register (0xd0=208)].

(1) Cy (PSW.7) PSW.7 is Cy, which is derived from the hardware and software changes when the most recent arithmetic or logical instruction was executed.

(2) Ac (PSW.6) Auxiliary carry flag, used for decimal adjustment operation of BCD code. Ac is set to 1 when the lower four bits carry to the upper four bits, otherwise it is cleared to 0. This bit can also be used in combination with the DA instruction.

(3) F0 (PSW.5) is the status flag used by the user. You can use it as you wish.

(4) RS1, RS0 (PSW.4, PSW.3): 4 groups of working register area selection control bits 1 and 0.

(5) OV (PSW.2) The overflow flag indicates whether an operation overflows when executing an arithmetic instruction.

(6) PSW.1 bit: reserved bit, not used.

(7) P (PSW.0) parity flag.

For example, RS1=1 is equivalent to PSW |=0x10; RS0=0 is equivalent to PSW &=0xf7;

Internal expansion RAM

STC8 integrates internal extended RAM. Whether the internal extended RAM of the microcontroller can be accessed is controlled by the EXTRAM bit in the auxiliary register AUXR.

The program memory and data memory of the STC8G series microcontroller are independently addressed.

The bus of the microcontroller, all program memory of the microcontroller is on-chip Flash memory, and external program memory cannot be accessed.

The STC8G series MCU has a large-capacity data memory integrated inside.

The internal RAM is logically divided into two address spaces: internal RAM (256 bytes) and internal extended RAM. The upper 128 bytes of the internal RAM are

The data memory and special function registers (SFRs) have overlapping addresses, but they are distinguished by different addressing modes when actually used.

7.1 Program Memory

The program memory is used to store user programs, data, tables and other information.

After the microcontroller is reset, the content of the program counter (PC) is 0000H, and the program starts executing from unit 0000H. In addition, the entry of the interrupt service program

The interrupt vector address (also called interrupt vector) is also located in the program memory unit. In the program memory, each interrupt has a fixed entry address.

After an interrupt occurs and is responded to, the microcontroller will automatically jump to the corresponding interrupt entry address to execute the program.

The entry address of the program is 0003H, the entry address of the timer/counter 0 (TIMER0) interrupt service program is 000BH, and the external interrupt 1 (INT1)

The entry address of the interrupt service routine of the timer/counter 1 (TIMER1) is 0013H, the entry address of the interrupt service routine of the timer/counter 1 (TIMER1) is 001BH, and so on.

For more interrupt service routine entry addresses (interrupt vectors), please refer to the interrupt introduction chapter.