S3C2440 interrupt analysis from 2440init.s to main

Publisher:平和宽容Latest update time:2023-09-04 Source: elecfansKeywords:S3C2440  interrupt  2440init  main Reading articles on mobile phones Scan QR code
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  This problem has troubled me for a long time. What is the mechanism of 2440 interrupt? I spent a lot of effort and finally figured it out. I would like to share it with you here.

  The implementation of interrupts is a combination of hardware and software mechanisms. They are abstracted: using the interrupt exception as a source point, under a certain mechanism, jump from Table 1 to Table 2, and then to Table 3.

Table I:

 

表二:
^ _ISR_STARTADDRESS ; _ISR_STARTADDRESS=0x33FF_FF00
HandleReset # 4
HandleUndef # 4
HandleSWI # 4
HandlePabort # 4
HandleDabort # 4
HandleReserved # 4
HandleIRQ # 4
HandleFIQ # 4

Table 3:

;Do not use the label 'IntVectorTable',
;The value of IntVectorTable is different with the address you think it may be.
;IntVectorTable
;@0x33FF_FF20
HandleEINT0 # 4
HandleEINT1 # 4
HandleEINT2 # 4
HandleEINT3 # 4
HandleEINT4_7 # 4
HandleEINT8_23 # 4
HandleCAM # 4 ; Added for 2440.
HandleBATFLT # 4
HandleTICK # 4
HandleWDT # 4
HandleTIMER0 # 4
HandleTIMER1 # 4
HandleTIMER2 # 4
HandleTIMER3 # 4
HandleTIMER4 # 4
HandleUART2 # 4
;@0x33FF_FF60
HandleLCD # 4
HandleDMA0 # 4
HandleDMA1 # 4
HandleDMA2 # 4
HandleDMA3 # 4
HandleMMC # 4
HandleSPI0 # 4
HandleUART1 # 4
HandleNFCON # 4 ; Added for 2440.
HandleUSBD # 4
HandleUSBH # 4
HandleIIC # 4
HandleUART0 # 4
HandleSPI1 # 4
HandleRTC # 4
HandleADC # 4
;@0x33FF_FFA0

  

 Detailed explanation of the jump process:

1. Exception --> Table 1

  This is determined by the hardware mechanism. When an exception occurs, the PC automatically points to the corresponding exception address. This address is determined by the hardware and cannot be changed.

2. Table 1 --> Table 2

  The corresponding address in Table 1 is stored: b HandlerIRQ;handler for IRQ interrupt

  HandlerLRQ is a label, the actual value is an address

 

Here we first take a look at the following macro and its definition:

    MACRO
$HandlerLabel   HANDLER   $HandleLabel

$HandlerLabel
  sub   sp,sp,#4 ;decrement sp(to store jump address)
  stmfd    sp!,{r0} ;PUSH the work register to stack(lr does not push because it return to original address)
  ldr     r0,=$HandleLabel;load the address of HandleXXX to r0
  ldr     r0,[r0] ;load the contents(service routine start address) of HandleXXX
  str     r0,[sp,#4] ;store the contents(ISR) of HandleXXX to stack
  ldmfd     sp!,{r0,pc} ;POP the work register and pc(jump to ISR)
    MEND

The following is a macro definition,

HandlerFIQ HANDLER HandleFIQ

Macro expansion results:

HandlerFIQ
  sub   sp,sp,#4 ;decrement sp(to store jump address)
  stmfd    sp!,{r0} ;PUSH the work register to stack(lr does not push because it return to original address)
  ldr     r0,=HandleFIQ;load the address of HandleXXX to r0
  ldr     r0,[r0] ;load the contents(service routine start address) of HandleXXX
  str     r0,[sp,#4] ;store the contents(ISR) of HandleXXX to stack
  ldmfd     sp!,{r0,pc} ;POP the work register and pc(jump to ISR)

 

After the macro expansion above, we found HandleFIQ, which is indeed the seventh address in Table 2. In this way, under the action of this macro named HANDLER, we jumped from Table 1 to Table 2;

But if you are careful, you will find: ldr r0,=HandleFIQ
                        ldr r0,[r0] 

 Here, the HandleFIQ value is finally assigned to r0. It is not just as simple as pc jumping to table 2, haha! Don’t rush and look below;

 

3. Table 2 --> Table 3

Continue the above analysis

; Setup IRQ handler
  ldr   r0,=HandleIRQ ;This routine is needed
  ldr   r1,=IsrIRQ ;if there is not 'subs pc,lr,#4' at 0x18, 0x1c
  str    r1,[r0]

Here, the value of a label IsrIRQ is assigned to HandleIRQ in Table 2. The above does not mean that pc points to the HandleIRQ value, so what is IsrIRQ?

 

IsrIRQ
  sub sp,sp,#4 ;reserved for PC
  stmfd sp!,{r8-r9}

  ldr r9,=INTOFFSET
  ldr r9,[r9]
  ldr r8,=HandleEINT0
  add r8,r8,r9,lsl #2
  ldr r8,[r8]
  str r8,[sp,#8]
  ldmfd sp!,{r8-r9,pc}


  LTORG

From this code we see a very familiar INTOFFSET, which is the value of this register. Its value represents the interrupt number of the current pend.

In this way, the pc jumps to the address corresponding to Table 3 based on INTOFFSET.

 

4. Table 3 --> Interrupt service function

This is the most exciting one, haha! Finally arrived at the c function,

 

pISR_EINT1 = (U32)Key1_ISR;

This equation assigns the address value of the interrupt service function to pISR_EINT1, and pISR_EINT1 is HandleEINT0 #4 in Table 3;

 

static void __irq Key1_ISR(void) //EINT1
{
  int led;
  rSRCPND = rSRCPND | (0x1<<1);
  rINTPND = rINTPND | (0x1<<1);
  led = rGPBDAT & (0x1<<5);
  if (led ==0)
  rGPBDAT = rGPBDAT | (0x1<<5);
  else
  rGPBDAT = rGPBDAT & ~(0x1<<5);
}


Keywords:S3C2440  interrupt  2440init  main Reference address:S3C2440 interrupt analysis from 2440init.s to main

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