Design of AT89C51 microcontroller digital logic non-circulating current reversible speed regulation system

1 Introduction

There are many machinery in production that require both forward and reverse rotation, and often require quick starting and braking, which requires a reversible speed control system. The reversible speed regulation system implemented by analog circuits has complex circuits, difficult adjustment, low reliability, and lack of flexible control. Therefore, here is a design scheme of a logic-free reversible speed control system based on a single-chip microcomputer. The system design adopts a fully digital circuit to realize functions such as digital pulse triggering, digital speed given detection and digital PI algorithm. The software realizes speed, current adjustment, logical judgment and complex operations. It has optimization and automatic functions that are different from general analog circuits. Adaptable, non-linear, intelligent and other control laws, and can be changed flexibly and conveniently.

2 System composition and control principle

2.1 System composition

The digital logic non-circulating current reversible speed regulation system uses the AT89C51 microcontroller to realize double closed-loop control, non-circulating current logic control, trigger pulse formation and phase control, as shown in Figure 1. In Figure 1, ASR is the speed loop, ACR is the current loop, DLC is the non-circulating current logic controller, GT is the trigger pulse, TA is the voltage transformer, TG is the tachometer generator, and M is the DC motor. The main circuit uses two sets of thyristor devices, the positive group VF and the reverse group VR, connected in anti-parallel. The control circuit adopts double closed-loop system of speed ASR and current ACR.

2.2 Control principle

Digital non-circulating current logic control selects the positive or negative group of thyristors based on the positive or negative output value of the speed regulator, and switches accordingly based on whether the current of the main circuit is zero. And remember the working status of the work group. The corresponding logical judgment is made through torque polarity detection and zero current detection, one group of thyristors is released, and the other group of thyristors is blocked. To this end, two storage units L1 and L2 are provided in the microcontroller to memorize the working status of the positive group thyristor vF and the reverse group thyristor VR.

3 System hardware design

The system hardware design is based on AT89C51 microcontroller as the core, which consists of program memory EPROM, address latch, A/D converter, 2 programmable counters, timer, pulse broadening, photoelectric isolation, pulse amplification, zero-crossing detection and waveform. The circuit structure such as edge detection is shown in Figure 2.

3.1 Trigger

The main transformer and synchronous transformer are both connected to D/Y-11, and the symmetrical three-phase AC synchronous voltage lags 30° after being phase-shifted by resistance and capacitance. Align the zero-crossing point of its AC waveform at the trigger delay angle α = 0°, and its trigger pulse can only be generated between 0° and 180°. The three-phase AC voltage after the resistor-capacitor phase shift passes through the zero detector and becomes a three-phase square wave with a mutual difference of 120° and a width of 180°, which is added to the P1.0, P1.1 and P1.2 pins of the microcontroller as the detected power state, and use this state as the basis for pulse distribution to determine the triggering sequence of VR and VF. The square wave edge detector outputs negative pulses at intervals of 60° as the external interrupt request signal of the microcontroller. The three-phase transformer generates 6 interrupt signals in each cycle, and completes pulse formation, distribution and shift control in each interrupt service routine.

3.2 PI regulator

The control law of PI regulator is:

In the formula, y (t) is the output of the PI regulator; e (t) is the input of the PI regulator; Kp is the proportional coefficient; T1 is the integration time constant.

After discretizing equation (1), the regulator output increment between the (k-1) and k sampling times can be obtained as △y(k):

In the formula, △e=ek-ek-1; yk is the k-th output of the PI regulator; yk-1 is the (k-1)-th output of the PI regulator; ek is the given quantity at the seventh sampling The deviation between the given quantity and the feedback quantity; ek-1 is the deviation between the given quantity and the feedback quantity at the k-1th sampling; KI is the integral coefficient,

The difference equation obtained from equation (5) is:

In the formula, KI=Kp-K2, K2=TKI; yn is the n-th sampling output; △Un is the input deviation during the n-th sampling. In order to improve accuracy, PI operations use double bytes.

3.3 Circulation-free logic control

The non-circulating current logic control selects the VR and VF thyristors based on the positive and negative output values ​​of the speed regulator, and makes corresponding logical judgments based on the torque polarity detection, releases one group of thyristors, blocks the other group of thyristors, and memorizes the VF and VR thyristors. The working status (0 or 1) is stored in the microcontroller storage units L1 and L2. When the thyristor is released, L1 and L2 store 1; when the thyristor is blocked, L1 and L2 store 0. These status signals are sent to the P1.5 and P1.6 pins of the microcontroller to control the release and latching of the trigger pulse.

4 System software design

The software design used to control current and speed determines the performance of the speed control device. The logic-free speed control system controlled by the microcontroller is required to complete the signal sampling, digital filtering, PI operation and real-time control of the two closed-loop systems in a few milliseconds. . The main program flow is shown in Figure 3.

In the main program, waiting for an interrupt is a stepping command. Since the response speed of the current inner loop is faster than the response speed of the speed outer loop, for this reason, in the scheduled interrupt service program T0, an interrupt request for external interrupt 1 is nested. The interrupt service program of external interrupt 1 first performs current sampling, and then performs PI operation with limiting and digital triggering according to the current situation. The system implements speed sampling, filtering and non-circulation logic switching through the timer T0 interrupt service program.

5 Conclusion

The results of the logical circulation-free reversible speed control system are shown in Figure 4. It can be seen from Figure 4 that the motor armature current changes rapidly and smoothly from the allowed maximum value to the steady-state value. There is no overshoot current and speed overshoot in the dynamic process from starting to steady state of the motor. The forward and reverse switching process is smooth and the dynamic performance is good. Research shows that the digital logic circulation-free reversible speed control system controlled by a single-chip microcomputer has good stability and high reliability, which improves the accuracy and control performance of the speed control system. In addition, it also has analog control systems such as information storage, data communication and fault diagnosis. Unavailable functions