OK6410A development board (eight) 12 linux-5.11 OK6410A start_kernel print angle first stage irq

Concepts related to irq

1. Hardware A: Exception Vector Table

2. Hardware A: irq hardware process and recommended software process

3. Hardware B: Chip-implemented interrupt controller

Data Sheet 12 VECTORED INTERRUPT CONTROLLERS P409

4. Software A: Software flow of Linux interrupt processing (IRQ part)

5. Software B: Linux interrupt processing software flow (interrupt controller part)

6. Software C: Linux interrupt processing software flow (irq_desc part)

hardware

2个VIC(Vectored Interrupt Controller, ARM PrimeCell

PL192)

2个TZIC(TrustZone Interrupt Controller, SP890)

1 VIC supports 32 interrupt sources

Programmable interrupt priority levels and programmable interrupt priority level masking

Can generate FIQ IRQ and SWI exceptions

Raw interrupt status/Interrupt request status that can be queried

start_kernel

local_irq_disable

// include/linux/irqflags.h

// 224 #define local_irq_disable() do { raw_local_irq_disable(); } while (0)

// 155 #define raw_local_irq_disable()     arch_local_irq_disable()

// arch/arm/include/asm/irqflags.h

// 46 #define arch_local_irq_disable arch_local_irq_disable

// 47 static inline void arch_local_irq_disable(void)                                  

// 48 {                                                                                

// 49     asm volatile(                                                                

// 50         "   cpsid i         @ arch_local_irq_disable"                            

// 51         :                                                                        

// 52         :                                                                        

// 53         : "memory", "cc");                                                       

// 54 } 

early_boot_irqs_disabled = true;

// init/main.c

// 124 bool early_boot_irqs_disabled __read_mostly;

early_irq_init

// kernel/irq/irqdesc.c

// 521 int __init early_irq_init(void)

// Print information

// NR_IRQS: 16, nr_irqs: 229, preallocated irqs: 229

// process: 

// 1. Calculate NR_IRQS nr_irqs initcnt

// 2. According to the number of initcnt (229), create (229) irq_desc and insert it into the data structure (radix_tree) variable irq_desc_tree

init_IRQ

// arch/arm/kernel/irq.c

// 78 void __init init_IRQ(void)

// Print information

/*

S3C6410 clocks: apll = 532000000, mpll = 532000000

        epll = 96000000, arm_clk = 532000000

VIC @(ptrval): id 0x00041192, vendor 0x41

irq: Cannot allocate irq_descs @ IRQ32, assuming pre-allocated

VIC @(ptrval): id 0x00041192, vendor 0x41

irq: Cannot allocate irq_descs @ IRQ64, assuming pre-allocated

*/

// process:

// 1. Call machine_desc->init_irq/s3c6410_init_irq to initialize the chip's irq (vic)

s3c6410_init_irq

s3c64xx_init_irq(~0 & ~(1 << 7), ~0);

s3c64xx_clk_init(NULL, xtal_f, xusbxti_f, soc_is_s3c6400(), S3C_VA_SYS);

// void __init vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources);

/*

// map.pfn:71200,map.virtual:f6000000,map.length:4000,map.type:0 // S3C64XX_PA_VIC0

// map.pfn:71300,map.virtual:f6010000,map.length:4000,map.type:0 // S3C64XX_PA_VIC1

*/

/* VIC0 is missing IRQ7, VIC1 is fully populated. */

// 0xf6000000,0x20,0xffffff7f,0x4

// hwirq_max number < 0x20, not equal to 0x20

vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, IRQ_VIC0_RESUME);

// 0xf6010000,0x40,0xffffffff,0x53020000

// hwirq_max is 0x40

vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, IRQ_VIC1_RESUME);

__vic_init

vic_disable(base);

vic_clear_interrupts(base);

vic_init2(base);

vic_register(base, NULL, irq_start, vic_sources, resume_sources, NULL);

Fill vic_devices[0,1]

set_handle_irq(vic_handle_irq);

handle_arch_irq = vic_handle_irq;

v->irq = IRQ_VICx_BASE;

// Establish a mapping between hardware interrupt number and software interrupt number

// 1. Register an irq domain to the system 

// Because a hardware system may have multiple interrupt controllers

// The hardware interrupt number of interrupt controller A cannot be distinguished from the hardware interrupt number of interrupt controller B

// So add a layer of irq domain

// Currently it is software interrupt number <-> domain <-> hardware interrupt number

v->domain = irq_domain_add_simple(node, fls(valid_sources), irq, &vic_irqdomain_ops, v);

// 2. Establish the mapping between hardware interrupt number and software interrupt number in the domain

// Establish the mapping relationship between HW interrupt ID and IRQ number.

// This interface function takes irq domain and HW interrupt ID as parameters and returns IRQ number (this IRQ number is dynamically allocated)

For each irq source, irq_create_mapping(v->domain, i);

// vic_sources: valid interrupt source, bit is 1, indicating valid

// resume_sources: interrupt sources that can be resumed, bit is 1, indicating valid

other

What structure is used to link hardware interrupt number <-> domain <-> software interrupt number?

irq_create_mapping -> irq_create_mapping_affinity -> irq_domain_associate(domain, virq, hwirq)

int irq_domain_associate(struct irq_domain *domain, unsigned int virq, irq_hw_number_t hwirq)

struct irq_data *irq_data = irq_get_irq_data(virq); 

struct irq_desc *desc = irq_to_desc(irq); // Find irq_desc through irq, this relationship is sealed in the data structure radix_tree 

radix_tree_lookup(&irq_desc_tree, irq);

return desc ? &desc->irq_data : NULL;

irq_data->hwirq = hwirq; // irq_data->hwirq exists in irq_desc 

irq_data->domain = domain; // irq_data->domain exists in irq_desc 

Related code

$ ls kernel/irq

autoprobe.c  debug.h   dummychip.c     handle.c     irqdesc.c    Kconfig   manage.c  proc.c    settings.h

chip.c       devres.c  generic-chip.c  internals.h  irqdomain.c  Makefile  pm.c      resend.c  spurious.c

$ ls drivers/irqchip/

irqchip.c  irq-vic.c  Kconfig  Makefile

# cat /proc/interrupts 

           CPU0      

Software interrupt number Frequency Interrupt controller hardware interrupt number (some are on vic0, some are on vic1) Interrupt trigger interrupt name 

 58:          0       VIC  26 Edge      s3c2410-wdt

 59:     757035       VIC  27 Edge      samsung_time_irq

 62:     478966       VIC  30 Edge      s3c-lcd

 69:        183       VIC   5 Edge      s3c6400-uart

 79:         25       VIC  15 Edge      ohci_hcd:usb1

 88:         35       VIC  24 Edge      mmc0

108: 87366 s3c-eint Level eth0

Err:          0

How drivers use interrupts

1. Find the software interrupt number based on the hardware interrupt number/or pin ID

platform_get_resource(pdev, IORESOURCE_IRQ, 0); 等

2. Apply for a handler based on the software interrupt number

request_threaded_irq/request_irq