"Beginner's C51 Self-study Notes" Timer (I)

Some knowledge about CPU timing:

Oscillation period: The period of the oscillation source that provides timing signals for the microcontroller (crystal oscillator period or external oscillation period).

State cycle: 2 oscillation cycles are 1 state cycle, represented by S. Oscillation cycle is also called S cycle or clock cycle. Machine cycle: 1 machine cycle contains 6 state cycles and 12 oscillation cycles.

Instruction cycle: The total time taken to complete one instruction, which is measured in machine cycles.

Some knowledge about timers:

The 51 single-chip microcomputer has two sets of timer/counters, which are called timer/counters because they can be used for both timing and counting.

The timer/counter and the microcontroller's CPU are independent of each other. The timer/counter works automatically without the CPU's involvement.

The timer/counter in the 51 single-chip microcomputer adds 1 to the data in the register based on the internal clock of the machine or the external pulse signal. 

structure:

The essence of the timer/counter is a 16-bit add-on counter, which consists of two registers, THx and TLx, with high and low 8 bits. TMOD is the working mode register of the timer/counter, which determines the working mode and function; TCON is the control register, which controls the start and stop of T0 and T1 and sets the overflow flag.

TMOD is used to set its working mode; TCON is used to control its startup and interrupt application.

Working mode register TMOD Working mode register TMOD is used to set the working mode of the timer/counter. The lower four bits are used for T0 and the upper four bits are used for T1.

GATE is the gate bit. When GATE=0, the timer/counter can be started by setting TR0 or TR1 in TCON to 1 through software. When GATA=1, the timer/counter can be started by setting TR0 or TR1 to 1 through software and the external interrupt pin INT0/1 is also at a high level.

C/T: Timing/counting mode selection bit. C/T = 0 is timing mode; C/T = 1 is counting mode.    

M1M0: Working mode setting bit. The timer/counter has four working modes.

TR1 (TCON.6): T1 operation control bit. When TR1 is set to 1, T1 starts to work; when TR1 is set to 0, T1 stops working. TR1 is set to 1 or cleared to 0 by software. Therefore, the start and stop of the timer/counter can be controlled by software. (Timer 1)

TR0 (TCON.4): T0 operation control bit, its function is similar to TR1. (Timer 0)

TF1 (TCON.7): T1 overflow interrupt request flag. When T1 counts overflow, TF1 is automatically set to 1 by hardware. After the CPU responds to the interrupt, TF1 is automatically cleared to 0 by hardware. When T1 is working, the CPU can query the status of TF1 at any time. Therefore, TF1 can be used as a flag for query testing. TF1 can also be set to 1 or cleared to 0 by software, which has the same effect as setting 1 or clearing 0 by hardware.

TF0 (TCON.5): T0 overflow interrupt request flag, its function is similar to TF1