MC9S12G timer interrupt settings

1. Turn off the timer module

When the TEN bit of TSCR1 is 0;

2. Set IOSx as output compare pin (taking 7 as an example)

TIOS_IOS7 = 1;

3. Binding Output Compare Pins

TCTL1_OM7 = 0;

TCTL1_OL7 = 1;

4. Set the comparison value of the counter (under 24Mhz system time, 0xBB is 1ms) interrupt period: 0x4926*128/24MHz = 100ms

TC7 = 0xBB;

5. Set the timer frequency division setting (taking 128 frequency division as an example)

TSCR2_PR = 0x7;

6. Set the timer to output after successful comparison to generate an interrupt

TSCR2_TCRE = 1;

7. Finally, start the timer

TSCR1_TEN = 1;

8. The interrupt function should be written as

#pragma CODE_SEG __NEAR_SEG NON_BANKED

   void interrupt VectorNumber_Vtimch7 TIM7_ISR(void)

{ 

// And clear the flag after each interrupt

TFLG1 =128U;

}

Code

void OutputCompare_Init(void)

    {

    TSCR1_TEN = 0; /* Disable Timer module before adjusting registers. */

    TIOS_IOS7 = 1; /* Set Channel 0 as output compare. */

    TCTL1_OM7 = 0; /* Set channel 0 to toggle when a Timer match occurs. */

    TCTL1_OL7 = 1; /* Set channel 0 to toggle when a Timer match occurs. */

    TC7 = 0xBB; /* Set a value for channel 0 timer compare. */

    TIE_C7I = 1; /* Enable channel 0 interrupt， handled by function TIM0ISR. */

    TSCR1_TSWAI = 1; /* Disables the timer module while in wait mode. */

    TSCR1_TSFRZ = 1; /* Disables the timer counter while in freeze mode. */

    TSCR2_PR = 0x7; /* Set prescaler to divide by 128 */

    TSCR2_TCRE = 1;

    TSCR1_TEN = 1; /* Timer Enable. */

    //Interrupt period: 0x4926*128/24MHz = 100ms

    }

#pragma CODE_SEG __NEAR_SEG NON_BANKED

  void interrupt VectorNumber_Vtimch7 TIM7_ISR(void)

    {

    TFLG1 =TFLG1_C7F_MASK; /* Clear channel 0 flag. */

     PORTB ^= bit4;

    }