GET is usually used to include source files that define constants. For example: GET 2440addr.inc
AREA is used to define a segment, ENTRY is used to specify the entry point of the program, and END is used to tell the assembler that the source file has ended.
For example:
AREA init, CODE, READONLY
ENTRY
......
END
EQU is used to define constants. Reminder: There must be a space before each ARM instruction. However, when using EQU to define constants, they must be written at the top of the line, otherwise the compiler will report an error.
LTORG is used to declare a text pool, which is a data buffer.
The ALIGN pseudo-operation adjusts the address pointer so that the current address satisfies a certain alignment. In ARM code, address labels are required to be word-aligned.
The MACRO and MEND pseudo-operations are used for macro definitions. The syntax is as follows:
MACRO
{$label} MacroName {$parameter1} {$parameter2} ...
; Add your own code here
MEND
Among them: $label represents a label, which is replaced by the corresponding value when the macro is expanded. MacroName is used to specify the macro name. $parameter represents the parameter to be passed. The items in {} are optional.
For example:
MACRO
$label HANDLER $HandleAddr
$label
sub sp, sp, #4
stmfd sp!, {r0}
ldr r0, =$HandleAddr
ldr r0, [r0]
str r0, [sp, #4]
ldmfd sp!, {r0, pc}
MEND
The macro can be called in the program as follows: HandlerIRQ HANDLER HandleIRQ
The macro expansion results are as follows:
HandlerIRQ
sub sp, sp, #4
stmfd sp!, {r0}
ldr r0, =HandleIRQ
ldr r0, [r0]
str r0, [sp, #4]
ldmfd sp!, {r0, pc}
MAP is used to define the first address of a memory table, where MAP can be represented by ^. FIELD is used to define a data field in a memory table, where FIELD can be represented by #. The usage is as follows:
_ISR_STARTADDRESS EQU0X33FFFF00
MAP _ISR_STARTADDRESS
HandleReset FIELD 4; The address range of HandleReset is 0X33FFFF00~0X33FFFF03
HandleUndef FIELD4; The address range of HandleUndef is 0X33FFFF04~0X33FFFF07
HandleSWI FIELD4; The address range of HandleSWI is 0X33FFFF08~0X33FFFF0B
HandlePabrt FIELD4; The address range of HandlePabrt is 0X33FFFF0C~0X33FFFF0F
HandleDabrt FIELD4; The address range of HandleDabrt is 0X33FFFF10~0X33FFFF13
The above way of defining the memory table is equivalent to the following way:
_ISR_STARTADDRESS EQU 0X33FFFF00
^ _ISR_STARTADDRESS
HandleReset #4; The address range of HandleReset is 0X33FFFF00~0X33FFFF03
HandleUndef #4; The address range of HandleUndef is 0X33FFFF04~0X33FFFF07
HandleSWI #4; The address range of HandleSWI is 0X33FFFF08~0X33FFFF0B
HandlePabrt #4; The address range of HandlePabrt is 0X33FFFF0C~0X33FFFF0F
HandleDabrt #4; The address range of HandleDabrt is 0X33FFFF10~0X33FFFF13
After the above memory table is established, it can be accessed from the C source file in the following way:
#define pISR_SWI (*(unsigned int*)(_ISR_STARTADDRESS+0x8))
ARM pseudo-instructions: medium-range address read instruction ADRL, large-range address read instruction LDR For example:
ADRL R1, var1; means reading the address of var1 into R1.
var1 DCD 5
LDR R1, =var1; means reading the address of var1 into R1.
var1 DCD 5
DCD is used to allocate a continuous memory unit and initialize it with expr: {label} DCD expr{,expr}... label represents the address of the allocated memory unit.
SPACE is used to allocate a memory unit and initialize it to 0: {label} SPACE expr label represents the starting address of the memory block, expr represents the number of bytes of memory to be allocated
For example: zero SPACE 12 allocates 12 bytes of continuous memory.
The structure of the ARM assembler:
There are several types of ARM source programs:
*.s: assembly language source file
*.inc: Files included by the assembly source file
*.c: C language source file
*.h: header file
Format specifications for writing assembly language source files:
All labels must be written at the top of a line.
All instructions cannot be written at the top of the line. There should be a space or Tab indentation before the instruction.
The comment starts from ";" and ends at this line.
Instructions and registers can be all uppercase or lowercase letters, but cannot be mixed.
When defining variables and constants, their identifiers must be written at the top of a line.
Examples of commonly used assembly language program submodules:
<1> Disable the watchdog timer
WTCON EQU 0X53000000
LDR R0, =WTCON
MOV R1, #0
STR R1, [R0]
<2>Memory data replication: Assume that R1 points to the starting address of the source data block, R2 points to the ending address of the source data block, and R3 points to the starting address of the destination data block.
loop
LDR R0, [R1], #4
STR R0,[R3]. #4
CMP R1,R2
BCC loop
<3> Batch loading and storage: Initialize SDRAM. SMRDATA is a data table defined in memory, occupying 13 words (52 bytes). BWSCON is the starting address of the memory controller register of the 2440 processor.
ADRL R0, SAMRDATA
LDMIA R0, {R1-R13}
LDR R0, = BWSCON
STMIA R0, {R1-R13}
<4>Stack operation: stack initialization
FIQMODE EQU 0X11
IRQMODE EQU 0X12
SVCMODE EQU 0X13
MODEMASK EQU 0X1F
NOINT EQU 0XC0
_STACK_BASE_ADDRESS EQU 0X33FF8000
FIQStack EQU (_STACK_BASE_ADDRESS-0X0) ;0X33FF8000~
IRQStack EQU (_STACK_BASE_ADDRESS-0X1000) ;0X33FF7000~
SVCStack EQU (_STACK_BASE_ADDRESS-0X2800) ;0X33FF5800~
InitStacks
MRS R0, CPSR
BIC R0, R0, #MODEMASK
ORR R1, R0, #IRQMODE | NOINT
MSR CPSR_CXSF, R1;IRQMode
LDR SP, =IRQStack;IRQStack=0x33FF7000
ORR R1, R0, #FIQMODE | NOINT
MSR CPSR_C, R1;FIQMode
LDR SP, =FIQStack;FIQStack=0x33FF8000
BIC R0, R0, #MODEMASK | NOINT
ORR R1, R0, #SVCMODE
MSR CPSR_CXSF, R1;SVCMode
LDR SP, =SVCStack;SVCStack=0x33FF5800
MOV PC, LR
<5>Realize table lookup function:
MOV R9, #4
LDR R8, =DATATABLE
LDR R8, [R8,R9,LSL,#2]
DATATABLE DCD 0X10, 0X20, 0X30, 0X40, 0X50
DCD 0X60, 0X70, 0X80, 0X90, 0XA0
/**************************************************************/
In bare metal program development based on ARM processors, the startup code is mainly used to prepare the basic operating environment for running user programs. It mainly implements the following functions:
<1>Create an exception interrupt vector table
<2> Initializing the stack in each mode
<3>Initialize hardware: including
Disable watchdog
Mask all interrupts
Initialize the clock
Initialize storage system: NandFlash, NorFlash, SDRAM, etc.
<4> Initialize the application execution environment: move the code and clear the uninitialized data segment ZI. An ARM image file is mainly composed of RO, RW, and ZI segments.
<5> Jump to the main program (user program) for execution.
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