ARM interrupt handlers generally handle various exception situations through the exception vector table. Interrupts are also an abnormal event. When an exception occurs, ARM will automatically jump to the address specified by the vector table to execute the corresponding processing function.
/Create vector table file vector_table.S/
/First create an exception vector table and map the vector table address to 0x00000000 or 0xffff0000/
.text
.align 2
.global vector_start
vector_start:
ldr pc, __reset //Reset 0x00000000
ldr pc, __undef //Undefined instruction 0x00000004
ldr pc, __svc //Administrator mode 0x00000008
ldr pc, __pabort //Instruction exception 0x0000000c
ldr pc, __dabort //Data exception 0x0000010
nop
ldr pc, __irp //Normal interrupt 0x00000018
ldr pc, __firp //fast interrupt 0x00000020
/Because the ldr instruction can only jump to the 4KB range starting from the current PC, the B instruction can jump to the 32MB instruction starting from the current PC, so in the vector table, a byte is called, this byte stores the first address of the corresponding processing function, and then jumps to the address within the byte/
__reset:
.word reset // allocate a byte of space to store the first address of the corresponding processing function, the same below
__undef:
.word undef
__undef:
.word svc
__undef:
.word pabort
__undef:
.word dabort
__undef:
.word irp
__undef:
.word irp
.text
.align 2
.global vector_end
vector_end: /No specific content, just indicates the end of the vector table/
/The following are specific exception handling functions, such as reset_handler(), which can be written directly in C program/
reset:
ldr sp, =0xfffffffc /allocation stack/same below
stmfd sp!, {r0-r12, lr} /Save the current state and address/same below
b reset_handler /Call processing function/same below
ldmfd sp!, {r0-r12, lr} /Return after exception handling/same below
undef:
b undef_handler
svc:
b svc_handler
favor:
b pabort_handler
dabort:
b dabort_handler
irp:
b irp_handler
firp:
b firp_handler
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