KST-STM Learning I2C+SPI

I can only say that it is not much different from 51. I will just record the main precautions here.

1. I2C communication is divided into standard mode 100kbit/s, fast mode 400kbit/s and high-speed mode 3.4Mbit/s. Because all I2C devices support standard mode, but not necessarily the other two speeds. 

Therefore, as a general I2C program, we choose 100k rate to implement it. That is to say, the timing generated by the actual program must be less than or equal to the timing parameter of 100k. For devices with special speed requirements, we can write high-speed communication programs specifically.

2. The I2C pin is an open-drain parallel structure. When the GPIO port pin of STM32 is set to open-drain output, the I/O level status can be directly obtained from the input data register. Therefore, the I2C pin is configured as open-drain output mode.

3. Since the I2C bus is high by default when idle, the pin needs to be set to output high level during initialization. However, setting the pin to output high level should not be done after initialization, but before initialization. 

This is because the I/O port of STM32 is in high impedance state when it is powered on and reset. After the reset, the GPIO port pin defaults to floating input. Due to the presence of the pull-up resistor, the I 2 C pin is pulled high; 

When the program is executed to I2C initialization, it is configured as open-drain output mode. Since the initial value of the GPIO port output data register is all 0 by default, the I/O port outputs a low level after initialization. If the pin is set to output a high level after initialization, a low-level glitch will inevitably be generated on the I/O port. 

If the corresponding bit of the output data register is set high before the I 2 C pin is initialized, the I/O port will directly output a high level after the I 2 C pin is initialized to avoid glitch signals.

4. In fact, the configuration process of I2C is quite complicated. For example, it is necessary to fully consider the processing methods such as conflicts and arbitration, but those processing methods are not used in most occasions. The design of the I2C protocol module of the STM32F103 series is too complicated and not very practical for practical applications. Therefore, when I2C is actually applied, it is better to use the IO port to directly simulate the protocol.

5. That is, the SPI master starts to output data half a clock cycle earlier than the first clock edge of SCK, but the SPI slave starts to output data after the chip select SSEL is set low. In short, the SPI device outputs data earlier than SCK, which is why the chip select must be enabled first during SPI communication.

6. Comparison between SPI and I2C

7. SPI interface

8. Pin connection 

9. SPI peripherals 

Things to note about SP3 

Things to note about NSS 

A few points to note (marked in yellow)

10. Configuration process

11. Comparison between SPI sending and receiving and USART

12. Data transmission process

The judgment of sending completion needs attention 

So how should we judge? 

If data is still written to SPI_DR when TXE = 0

13. Domineering...

14. Notes on receiving and sending in SPI query mode