The CAN of STM32 is called bxCAN (Basic Extended CAN), which supports CAN protocol 2.0A and 2.0B. The basic type of STM32 has only one master CAN, and the interconnected type has one master CAN and one slave CAN.
1. About CAN_RX and CAN_TX
CAN communication is divided into CNA controller and CAN transceiver. The signals from CAN controller are CAN_RX and CAN_TX. Signal and level conversion are realized by CAN transceiver. You can see it by looking at the schematic diagram of CAN transceiver such as TJA1050.
2. STM32's bxCAN is divided into master/slave
●CAN1: is the master bxCAN, it manages the communication between the slave bxCAN and the 512-byte SRAM memory
●CAN2: is the slave bxCAN, it cannot directly access the SRAM memory
● The two bxCAN modules share 512 bytes of SRAM memory
Note: In medium and large capacity products, USB and CAN share a dedicated 512-byte SRAM memory for data transmission and reception, so USB and CAN cannot be used at the same time (the shared SRAM is accessed exclusively by the USB and CAN modules). USB and CAN can be used in an application at the same time but not at the same time.
STM32 has two bxCAN peripherals, namely CAN1 and CAN2. These two CAN peripherals each have their own send mailbox, receive FIFO0 and FIFO1. However, in addition to this, CAN also has a receive filter, while CAN2 does not. However, in actual work, only one receive filter is needed, not both CANs. Therefore, CAN2 can completely share the receive filter of CAN1 (this is the 512-byte SRAM shared by CAN1 and CAN2), but it is indirectly accessed through the memory read-write controller of CAN1 inside the chip. From the structure of CAN1 and CAN2, it is not surprising to regard CAN1 as the main CAN and CAN2 as the slave CAN. Except for the name, there is no difference in use and function. These are just the design of bxCAN inside the chip, and bxCAN is completely multi-master mode externally.
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