MIT-BIH ECG data D/A playback design based on STM32

    The MIT-BIH ECG data D/A playback design based on STM32 introduces the overall design scheme, hardware composition, software design, etc. By reading the ECG data and performing D/A conversion on it, the output waveform is compared with the original waveform, and the playback function is well realized. It can be seen that the performance indicators of the system meet the design requirements. It can well realize the ECG data playback, laying a good foundation for the simulation practice of a series of ECG algorithms and the development of real-time ECG monitors.

    ECG signal is one of the earliest bioelectric signals studied and applied in clinical medicine. The analysis and processing of ECG signal can effectively predict heart disease. How to use ECG data to develop and research related medical equipment is crucial for researchers. ECG data playback is to convert the original stored MIT-BIH ECG data into analog signals from the terminal through D/A conversion according to its storage format. This article introduces the design method of ECG signal data playback based on the STM32 microcontroller based on the ARM Cortex-M3 core as the main control embedded chip.

    1 Working Principle and Hardware Design

    The host computer application reads a file in the ECG database and uses the device driver to communicate with the D/A playback module device. The USB bus continuously sends data to the hardware device. The original data received by the device is continuously and without loss transmitted to the DAC module using the DMA transmission method. Under the triggering of the timer, the DAC module completes the D/A conversion of the data and finally plays back the analog signal on the terminal device, i.e., the oscilloscope.

    The D/A playback hardware block diagram is shown in Figure 1.

    1.1 Introduction to STM32F103XX microprocessor

    The system hardware uses the new 32-bit microcontroller STM32F103RE based on the Cortex-M3 core developed by STMicroelectronics as the main control chip, with an operating frequency of up to 72 MHz. It integrates a variety of peripherals such as RAM, full-speed USB 2.0 device interface module and dual-channel 12-bit high-precision D/A conversion module. While combining high performance, low power consumption and low voltage, it maintains a high degree of integration and easy development characteristics. When developing applications, only a small number of peripheral circuits need to be connected to make the circuit structure simple and compact.

    1.2 D/A conversion module

    The D/A converter module (DAC) is a 12-bit digital input, voltage output D/A converter. The DAC can be configured in 8-bit or 12-bit mode, and can also be used in conjunction with a DMA controller. The DAC has two output channels, each with a separate converter, and can work in dual DAC mode. The DAC integrates two output buffers that can be used to reduce output impedance and directly drive external loads without an external op amp. The DAC conversion can be triggered by external events (timer counter, external interrupt line) and software.

    After enabling the DAC channel, the corresponding GPIO pin (PA4 or PA5) of the STM32F103XX will automatically be connected to the analog output of the DAC. To avoid parasitic interference and additional power consumption, pins PA4 and PA5 are configured as analog inputs (AIN), as shown in Figure 2.

    1.3 USB full-speed device interface

    The USB peripheral interface implements the interface between the USB 2.0 full-speed bus and the APB1 bus, providing a USB-compliant communication connection between the PC host and the microcontroller. Data is transferred between the PC host and the microcontroller by sharing the USB endpoint buffer.

    The STM32 chip integrates USB peripherals, which greatly reduces the design burden of USB circuits. You only need to design the USB interface circuit to realize the USB communication design of the STM32 chip circuit board. The USB hardware interface circuit selected by the D/A playback system is shown in Figure 3: The USB pull-up voltage is connected to the D+ line, so this design realizes full-speed communication of USB, and the PC supplies power to the USB interface. USB+ is connected to GPIO pin PA11, and USB- is connected to GPIO pin PA12, as shown in Figure 2:

    2 Firmware Programming

    The firmware program is the program code running in the USB device, which is used to assist the hardware to complete the USB function. The system firmware program uses the USB-FS-DevICe Library provided by STM. It mainly completes the following functions: first, it handles USB standard requests and user-defined requests; second, it sets various descriptors of the device according to the USB specification; third, it initializes the system's interrupts at all levels and the configuration of internal endpoints. In the Keil compilation environment, using the ready-made firmware program framework function, according to the device requirements, add the corresponding program code in the firmware program framework provided by STM to complete the functional purpose of this playback system.

    2.1 Introduction to STM32F103xxUSB firmware library

The STM32F103xxUSB firmware library is a firmware library provided by     STMicroelectronics specifically for the STM32F103XX series ARM microprocessors . It is mainly divided into a kernel layer and an application interface layer. The structure diagram is shown in Figure 4.

    Kernel layer: This layer manages the direct communication between the USB IP hardware and the USB standard protocol. The USB library kernel complies with the USB 2.0 standard and is separated from the standard STM32F103XX firmware library.

    Application Interface Layer: This layer provides the user with a complete interface between the kernel and the end application. The application interface layer and the end application communicate with the firmware library to manage the hardware requirements of the application.

    2.2 Firmware Program Design

    In the development of this system, the kernel layer was not studied and modified in depth, and only the application interface layer was designed to complete the device function. The development of the application layer mainly includes: system initialization, which mainly turns on the clock of the system and the peripherals used; USB clock configuration, setting and enabling the USB clock to 48 MHz ; USB initialization mainly completes the enumeration of USB devices; timer module configuration, DAC and DMA module configuration mainly completes the initialization of the peripherals used; finally, after the flag is configured, wait for the host computer to send data. All codes are completed using library functions, and the main program flow chart is shown in Figure 5.

    When a USB device is inserted, the host will query each USB port in turn. If a voltage difference is detected between D+ and D-, it will recognize that a USB device has been inserted, and then enumerate the device. In the designed D/A playback system, the enumeration process is mainly implemented by configuring the device descriptor, configuration descriptor, port descriptor, and endpoint descriptor of the USB device. The process of USB device enumeration is to obtain the information of the USB device by reading each descriptor, and then configure it as one of the functions.

    In the design of the D/A playback system module, a total of three endpoints are used, namely endpoints 0, 2 and 3. Endpoint 0 is the default control endpoint of the USB device, which adopts the control transmission mode and mainly completes the enumeration of the device. Endpoints 2 and 3 are both bulk transfer endpoints, and the data transmission adopts the bulk transmission mode, respectively receiving the ECG signal data and respiratory signal data sent by the host computer. The timer is a beat generator, which serves as the external event trigger source of the DAC. The preload value and clock division coefficient of the timing clock are determined by the sampling frequency of the original digital signal. In the D/A playback system, two general timers 3 and 4 are used as the trigger source for the DA digital-to-analog conversion of the ECG signal and respiratory signal data respectively. The DAC is configured as a dual-channel mode with 12-bit data right-aligned input and voltage output. Among them, channel 1 completes the D/A of the ECG signal data, and channel 2 completes the D/A of the respiratory signal data. The timer is selected as the external event trigger source to complete the DA implementation of the data once within a timing cycle. The DMA module is mainly used to complete the data transfer. The USB module receives the data received by the endpoint interrupt and uses the DMA method to send it from the endpoint buffer to the DAC_DHRyyD register of the DAC. After the corresponding shift, the written data is transferred to the DHR1 and DHR2 registers, and then transmitted to the DORx register through the external event trigger of the timer. After the time tsetting, the output is valid. In the data transmission process, a double buffer mechanism is adopted. Two buffers are opened in the RAM. The USB module receives the data and puts it in one buffer. The DMA transmission is the DAC stage. The processed data is the data in the other buffer. In this way, the receiving data and the processing data are carried out in parallel, ensuring the continuity of the converted waveform. The implementation of double buffering is roughly as follows (taking ECG signal data as an example): initialize the idle buffer bit to buffer1, and the DMA source is initialized and configured to buffer1. Endpoint 2 receives a data packet and puts it in buffer1. It is determined whether it is the first time to receive data. If it is the first time to receive, change the idle buffer bit to buffer2 and allow the next data packet to be received; if it is not the first time, the interrupt returns directly. Continue to receive the second data packet, put it into buffer2, and determine whether it is the first DMA transfer. If so, change the idle buffer bit to buffer1, start DMA transfer, and enable the timer; if not, the interrupt returns. When the DMA transfer is completed and enters the interrupt, first determine the idle buffer bit, then reconfigure DMA, including changes in DMA source and transfer number, and finally change the idle buffer bit, and allow the endpoint to continue receiving. The ECG signal data reception process flow chart is shown in Figure 6. The same process is done for the respiratory signal data.

    3 Design of device drivers and application programs

    The USB driver of this system adopts the WDM model, and the development tools selected are Windows  XP DDK (Build 2600), Driver Studio 3.2 and VC 6.0. After the driver development platform is successfully built, according to actual needs, the DriverWizard provided by DriverWorks is used to generate the driver framework and Read and Write functions, and the device control program is added to the Dev IC eIoControl function to complete the customized functions.

    The host computer application is a multi-document interface application based on MFC created with VC 6.0, which is mainly divided into basic modules such as data management module and playback module. The communication between Win32 application and device driver is realized through interface (API) function. The application does not need to understand the complex USB protocol in order to communicate with USB devices. It can operate the USB interface as a file, thus realizing USB interface communication easily.

    4 System playback results analysis

    According to the design of the firmware program, write to the USB device, insert it into the host and load the corresponding driver, open the host computer program, read the 220.dat file in the database, transfer it to STM32 to complete D/A, and the comparison between the original ECG signal waveform and the oscilloscope playback waveform is shown in Figure 7.

    The D/A module has completed the playback function well. Through real-time analysis by oscilloscope, the playback waveform period and amplitude also meet the requirements, that is, the timing meets the requirements.

    5 Conclusion

    The design of MIT-BIH ECG data D/A playback based on STM32 has achieved a relatively perfect combination of hardware and firmware application programs, and has achieved good operation results for the D/A playback of raw data. At the same time, the rich functional modules integrated inside the main control chip STM32F103RE reduce the difficulty of development and ensure the stability of the system, making the playback system have broad application prospects in medical research and industrial production.