Software process to improve the flash erase and write life of MSP430G series microcontrollers

    In embedded design, many application designs need to use EEPROM to store non-volatile data. Due to cost reasons, some microcontrollers do not have EEPROM integrated inside the chip. The MSP430G series processors are low-cost 16-bit processors launched by TI. There is no EEPROM in the MSP430G series microcontrollers. In order to store non-volatile data, the MSP430G series processors divide 256 bytes of Flash space inside the chip as information Flash, which can be used to store non-volatile data. However, due to the gap between Flash and EEPROM in erase and write life, this application method cannot meet the needs of all customers in actual applications. This application note introduces a method of using code area Flash to simulate EEPROM, which can greatly increase the data storage cycle through certain software processing algorithms. This article gives the software flow to implement the above functions.

    1. Comparison of the main features of embedded Flash storage media and EEPROM

    Electrically Erasable and Programmable Read-Only Memory (EEPROM) is a key device used in most embedded applications to store non-volatile data. It is used to save data during program execution. Flash Memory (Flash for short) is a non-volatile memory that is widely used in various embedded processors to store program code.

    Due to hardware cost reasons, many embedded processors do not have integrated EEPROM modules. Usually, we can use the application method of storing non-volatile data in the on-chip Flash memory to meet the usage requirements. For some common applications, this usage method can meet the requirements.

Table 1 Comparative analysis of EEPROM and Flash

    1.1 Write access time

    Since EEPROM and Flash have different working characteristics, their write access times are also different. Flash has a shorter write access time, so it is more suitable for occasions that require storage speed.

    1.2 Writing Methods

    The biggest difference between external EEPROM and Flash emulated EEPROM is the writing method.

    EEPROM: The writing operation of EEPROM does not require additional operations, only power supply is required; however, once the writing operation process is started, the writing operation cannot be interrupted. Therefore, external capacitors and other measures are required to ensure that the power supply can be maintained when the chip loses power to ensure the completion of data operations.

    Flash emulation EEPROM: When the chip is powered on, the write operation can be interrupted by power failure and chip reset. Compared with EEPROM, the application designer needs to add relevant processing to deal with possible exceptions.

    1.3 Erase and write time

    There is a big difference in erase time between EEPROM and EEPROM emulated with Flash.

    Unlike Flash, EEPROM does not need to be erased before writing. Since Flash takes several milliseconds to erase, if power is lost during the erase operation, the software needs to do relevant protection. In order to design a robust Flash memory management software, it is necessary to deeply understand and master the characteristics of the Flash memory erase process.

    2. How to increase the erase and write life of Flash emulated EEPROM

    Different methods can be used to implement Flash memory emulation EEPROM according to user needs.

    2.1 Virtual address plus data solution

    Usually more than two pages of Flash space are required to simulate EEPROM. After power-on, the initialization code first finds the valid page and initializes another page to the erased state to provide byte write capability and serve as a backup and ready to perform write operations at any time. The variable data that needs to be stored in EEPROM is first written to the valid page. When the valid page is full, the final state of all data needs to be saved to the backup page and switched to the backup page for operation. The first byte of each page is usually used to indicate the state of the page.

    Each page has 3 possible states:

    Erased state: The page is empty.

    Full data state: The page is full of data and is ready to switch to the next page for operation.

    Valid page status: The page contains valid data and the indication status has not changed. All valid data has been copied to the erased page.

    The following figure uses the method of emulating EEPROM with two pages as an example to describe the switching process of the page status word between page 0 and page 1.

    In this way, users do not know how often the data is refreshed .

    The following figure describes the application mode of using two pages of simulated EEPROM as an example. In order to facilitate the acquisition of simulated EEPROM data and update data content, each storage variable element defines an operation unit in Flash.

    Each storage variable element is assigned a virtual operation address, that is, an EEPROM operation unit contains a virtual address unit and a data unit. When the content of the data unit needs to be modified, the new data content and the previously assigned virtual address are written into a new simulated EEPROM memory unit, and the latest modified data content is returned at the same time. The EEPROM storage unit format is described in Figure 2.

    The scheme of using virtual address plus data is summarized as follows.

    • Assign a virtual address to each target storage variable, which needs to be stored in the Flash. When reading the storage variable content, the virtual EEPROM needs to be searched according to the virtual address of the variable and the most recently updated content is returned.

    • In software processing, it is necessary to record the physical destination address of the next write; after each write operation, the destination operation pointer is automatically accumulated according to the EEPROM storage unit size (operation granularity).

    • When a page is full, the EEPROM data of all variables needs to be copied to the next page, and then the erase operation of the page is performed.

    • Appropriate verification mechanisms need to be added to embedded software processing to ensure the correctness of written data and to monitor whether the Flash has expired.

    2.2 Sub-page division scheme

    At least two pages are divided in Flash to simulate EEPROM. According to application requirements, the variable data to be written to EEPROM for storage is divided into a fixed-length array (subpage), such as 16 bytes or 32 bytes. After the page is divided into several subpages, all subpages in Flash need to be numbered in sequence according to the address order. The first byte of each subpage is usually used to indicate the status of the subpage, which can be: empty, written or invalid.

    When the chip is powered on and initialized, the first subpage that has not been written to is first found and marked. When writing to the EEPROM, the application needs to sort all the data to be written to the EEPROM subpage in a pre-agreed order, and then write all the variable data to the empty subpage at once. Finally, the operation pointer of the simulated EEPROM points to the next free subpage and waits for the next write. After a page is filled with data, an erase operation is performed. The jump of the pointer to the subpage needs to be handled properly.

    Each page has 3 possible states:

    Erased state: The page is empty.

    Full data state: The page is full of data.

    Valid page status: The page contains valid data and the page is not yet full, and data can still be written to the subpage.

    Figure 3 introduces the data processing method of Flash emulation EEPROM using sub-pages.

    2.2.1 Software Description

    In software implementation, in order to facilitate software processing, it is recommended to define some key macro definitions and structures to specify the start and end addresses, page size, sub-page size, number of sub-pages per page and other parameters of the Flash emulated EEPROM. At the same time, the parameters that need to be operated are encapsulated to facilitate software operation and management. It is not recommended to define many discrete flag variables.

    In terms of software operation, the Flash emulation EEPROM module needs to provide several API interfaces for application programs to call.

    • Define the device type through the typedef keyword, typedef unsigned char u8;

    • ChkFstPowerOnInfo() is used to detect whether the chip is powered on for the first time and initialize the EEPROM parameters to the memory. The prototype is as follows.

    Void ChkFstPowerOnInfo(void);

    • FlashWrite() is used to write Flash. The parameters passed include a pointer to the data to be written, the starting byte number of the data to be written in the subpage, and the length of the data to be written. The prototype is as follows.

    void FlashWrite( u8 *array, u8 startNum, u8 length );

    • FlashErase() is used to erase Flash. The parameter passed is the sub-page number. In the erase function, it is necessary to determine whether the page erase operation needs to be performed based on the sub-page number. The prototype is as follows.

    void FlashErase(u8 seg_sn);

    2.2.2 Software Flowchart

    After the software is started, the flowchart of initializing the simulated EEPROM is described as follows.

    The software flow of calling API and writing data to the simulated EEPROM is shown in Figure 5. In software processing, special attention should be paid to the switching of the target pointer and ensuring the correctness of the written data. If the code space allows, some verification algorithms can be added to ensure this.

    The scheme of dividing sub-pages is summarized as follows.

    • The length of data written to the simulated EEPROM each time is fixed, which is the length of the sub-page.

    • The software needs to define a storage variable structure to refresh and synchronize the simulated EEPROM content. Before writing data to the simulated EEPROM, the programmer needs to organize all target storage variables in memory according to the agreed data format.

    • In software processing, it is necessary to calculate the physical addresses of the current write and the next write; after each write operation, the destination operation pointer pointing to the subpage is automatically accumulated according to the subpage length.

    • After a page is full, the last updated simulated EEPROM data needs to be copied to the next page, and then an erase operation is performed on the full page.

    • Appropriate verification mechanisms need to be added to the embedded software processing to ensure the correctness of the written data and to monitor whether the Flash subpage used to emulate the EEPROM function has failed.

    2.3 Comparative analysis of the two solutions

    The comparative analysis of the two schemes is shown in Table 2.

Table 2 Comparative analysis of the two solutions

    3. Practical embedded applications

    According to software requirements, it is recommended to use bytes (8 bits) as the minimum granularity of operations, which will have wider applicability.

    3.1  Improving the erase and write life of Flash memory

For the MSP 430G series Flash memory, the programming and erasing lifespan can be guaranteed to be at least 10,000 times, as shown in Figure 6.

Figure 6. Flash programming and erasing life of MSP430G series microcontrollers

    The use of small page division combined with at least 2 large page allocations can greatly increase the erase and write life of the Flash emulated EEPROM. For example, for the MSP430G series microcontrollers, if the size of each small page is divided into 16 bytes and 2 large pages (512 bytes per page) are used as emulated EEPROM, 64 operating sub-pages ((512/16) x2 = 64) can be provided, which can ensure an erase and write life of at least 640,000 times.

    3.2 Exception handling during power failure

    If power is lost during Flash data storage, data may not be saved successfully and there may be an abnormality. In order to enhance robustness, software processing needs to consider situations such as abnormal power loss of the device that may cause Flash erase failure.

    In software processing, after the Flash data is successfully saved, the status flag of the subpage is written. After the microcontroller is powered on, the user program will find the subpage written last time, and then restore the data content of the subpage to the data structure in the memory.

    4. System reliability design

    4.1 Clock Source Selection

    Since the clock source (ACLK, MCLK, SMCLK) and clock frequency of the Flash driver can be set, in order to ensure the reliability when writing data to the simulated EEPROM, it is recommended to reduce the Flash clock frequency before operating it. For example, reduce the Flash clock frequency to 1MHz before writing. It should be noted that after reducing the clock frequency, if this clock source is also the clock source of the timer, it may affect the timing accuracy of the timer, which requires good processing in the software.

    4.2 Code runs in RAM

    Since writing data to Flash is done by executing the program code in Flash, erasing and programming Flash. Since programming Flash requires a boost operation inside the MCU, if there is enough memory space, it is recommended to copy the key codes such as programming and erasing to RAM for execution, which can be specified using the keyword __ramfunc, as shown in Figure 7 below.

    5. Conclusion

    This article discusses the use of MSP430G series microcontrollers in the application of Flash emulated EEPROM from the perspective of software and security, and provides two different methods for selection. Both methods can greatly improve the programming and erasing life of the emulated EEPROM and meet the requirements of high-reliability application design. Users can choose according to specific applications.