Universal network measurement and control combining embedded system with ZigBee wireless technology

　　With the introduction of the concept of the Internet of Things and the development of related technologies, networked measurement and control has become an inevitable trend in the development of measurement and control systems. However, the PLC (Programable LogIC Controller) currently used in the field of industrial control at home and abroad and with quite mature technology basically does not support the network, nor can it be simply upgraded to have network functions, and the mode is relatively single. Therefore, a networked general measurement and control system platform is designed and implemented to meet the needs of networked measurement and control and have the general performance of a general platform. This paper mainly introduces the hardware design of a general network measurement and control platform that combines ARM embedded systems with ZigBee wireless technology.

　　1 Overall design of system hardware

　　The hardware architecture of the general network measurement and control system based on ARM is shown in Figure 1. This system uses an ARM-based CPU at the measurement and control end, which is connected to the Internet through a network interface. The peripheral expansion includes digital input/output modules, analog input/output modules, and wireless ZigBee networking data transmission modules. The main research contents of the hardware design include: ARM-based embedded main control hardware platform, ZigBee wireless network data transmission module, measurement and control I/O module hardware, and analysis and testing of the universal indicators and networking performance of the hardware system.

Figure 1 System hardware architecture

　　2 ARM main control module hardware

　　The core chip of the system is the S3C2440A 16/32-bit RSIC (Reduced Instruction Set Computer) microprocessor based on the ARM920T core produced by Samsung. The chip has rich resources, fast computing speed, powerful functions, and a relatively reasonable price. The core board system block diagram is shown in Figure 2.

Figure 2 Core board system block diagram

　　2.1 Memory Circuit

　　The FLASH memory uses the 64M×8b K9F1208U0M Nand FLASH memory chip produced by Samsung Semiconductor. This system uses one chip to form a 64MB FLASH, and the system's boot code Bootloader file, kernel image file and file system are all stored here. The SDRAM memory uses the 4 Banks×4M×16b HY57V561620 CSD-RAM chip produced by Hynix. In order to ensure the operating speed of the system, this system uses two chips in parallel to form a 32-bit data memory.

　　2.2  JTAG Debug Interface

　　JTAG (Joint Test Action Group) is an international standard test protocol (IEEE 1149.1 compatible), mainly used for internal chip testing. It encapsulates a special test circuit TAP (Test Access Port) inside the chip , tests internal nodes through a dedicated JTAG test tool, and can also be used for online programming. The standard JTAG interface is 4-wire: TMS, TCK, TDI, TDO, which are mode selection, clock, data input and data output lines respectively. The system uses a 20-pin standard interface for online debugging and downloading the system Bootloader.

　　2.3  Power supply and system clock circuit

　　The reliability of power supply design is related to the stability of system operation. The input power of this system is 5 V, which is stabilized to 3.3 V by LM1117 chip. Large capacitors are used to suppress low-frequency interference, and small capacitors are used to suppress high-frequency interference. They are used to power the chip interface. At the same time, a dedicated power chip MIC5219BMM is used to provide a low-noise 1.3 V voltage for the core to ensure stable system power supply.

　　The system clock is mainly divided into the main frequency clock FCLK, AHB bus device clock HCLK, APH bus device clock PCLK. This system uses an external 12 MHz crystal oscillator , and selects the clock source of S3C2440 as the external crystal oscillator XTI PLL by setting the mode selection pins OM[2:3] of S3C2440 to low level . At the same time, the core clock and USB clock can be obtained through the two phase-locked loops MPLL and UPLL on the chip .

　　2.4 Serial interface circuit

　　Currently, basically all kinds of processors have serial ports. The serial ports in this system are mainly used for early debugging and communication with the main wireless module. Since the CPU serial port pin level is not the standard RS 232 level, level conversion is required when connecting to a PC for debugging , while communication with a wireless module can be directly connected. It can be modified to a ZigBee data transceiver driver based on the Linux kernel serial port driver, and its circuit is shown in Figure 3.

Figure 3 Serial interface circuit

　　2.5 Network interface circuit

　　The network interface circuit is an important hardware part of the system. In order to ensure the stability and smoothness of network data transmission, the 10/100 Mb/s adaptive Ethernet MAC controller chip DM9000A is used in this system. The chip has a 10/100 Mb/s adaptive PHY and a 4K DWORD value SRAM. The physical protocol layer interface fully complies with the IEEE 802.3u specification and supports IEEE802.3x full-duplex flow control. nGCS3 on the main control module board is connected to the chip select CS# of DM9000A, the address is configured as 0x18000002, and LDATA[15:0] is connected to the DM9000A data bit SD[15:0] to form a 16-bit data bus mode. In addition, HS9016 is used for I/O isolation and voltage conversion, and then connected to the RJ45 interface. The isolation circuit is shown in Figure 4.

Figure 4 Network interface isolation transformer circuit

　　3 Measurement and Control I/O Module Hardware

　　3.1 Digital Input/Output Module

　　The system realizes 8-way digital input and 8-way digital output. CH573 is used to latch the digital output and CH245 is used to select the input. In order to save port resources, the 8 data lines of digital input and output are multiplexed. The multiplexing of output and input is realized by controlling the latch signal of CH573 and the chip select signal of CH245. At the same time, optical couplers are used for port photoelectric isolation.

　　3.2 Analog Input/Output Module

　　The system A/D realizes 4-channel 12-bit analog quantity or 2-channel 12-bit differential signal analog quantity sampling input, and the system D/A realizes 2-channel 12-bit analog quantity output. The module A/D uses the 12-bit analog-to - digital converter MCP3204 produced by MICro Chip , with a sampling rate of up to 100 KSPS and a low price; the module D/A uses the 12-bit digital-to-analog converter TLV5638 of TI. The chip has an internal reference, a settling time of 1 to 3.5 μs, and has 2-channel analog quantity output capability. Only an external signal conditioning circuit is required. Since the above two chips are both SPI interfaces, they can be directly connected to the SPI bus interface of the processor, and the data transmission switching is controlled by chip selects CS0 and CS1. Its structure diagram is shown in Figure 5.

Figure 5 Analog I/O module structure diagram

　　4 ZigBee wireless module hardware

　　ZigBee technology is a wireless communication technology that is developing rapidly and becoming increasingly mature. It uses the internationally available free frequency band of 2.4 GHz and has the advantages of low power consumption, low cost, and low complexity. ZigBee technology is easy to realize automatic networking, has a large network capacity, can accommodate up to 65,000 nodes, and data communication can be carried out between any nodes in the network. The network has star, tree, and mesh network topologies.

　　This system uses the SOC chip CC 2430 produced by TI, which has a built-in enhanced 8051 core, rich interfaces, 8 KB SDRAM, 128 KB flash memory, and can be configured as FFD (full function device) or RFD (reduced function device) by adding power circuit, crystal oscillator circuit, and antenna without other external expansion. Therefore, the hardware design is simple and the cost is relatively low. The module uses a serial port to communicate with the ARM system. The actual picture is shown in Figure 6.

Figure 6 Actual picture

　　5 System Analysis and Testing

　　The networking in this system is mainly reflected in two aspects. One is the wireless network composed of ZigBee, which is used for wireless data collection. The other is the Internet network, which is used for data exchange between the embedded system and the main control end. In addition, the measurement and control I/O module of this system complies with the standard measurement and control voltage and current specification definition, and adopts ZigBee wireless technology, which can realize simple secondary development. After software testing, the system can complete network measurement and control of different physical quantities, local or remote, wireless or wired, and with certain accuracy and real-time performance, and has the performance of a general platform.

　　6 Conclusion

　　Networking is an important direction for the development of measurement and control technology. With the development of network technology, a universal platform is also needed to unify the scattered measurement and control points. Based on the above considerations, this paper proposes the basic design ideas of a universal network measurement and control system, and also explains a relatively detailed hardware design scheme. The system has good versatility, reasonable network design, low cost, and is easy to commercialize. After simple settings or secondary development, the system can be applied to a wide range of industries and fields such as industrial production workshops, smart homes , and oil field and oil well telemetry.