There are several points that are easy to go wrong in SPI two-machine communication using DMA:
1) Frequency division value: The maximum frequency of SPI is 18M, SPI1 is on APB2 with a frequency of 72M, and SPI2 is on APB1 with a frequency of 36M. If the chip clock frequency is 72M, then the frequency division value of SPI1 is 4 and the frequency division value of SPI2 is 2.
2) DMA start sequence: I saw someone on the Internet saying that you should start the slave to send first, then the master to send, then the slave to receive, and finally the master to receive. I don't know why you should do this, and this way of starting DMA is difficult to implement. You may need to add two more handshake lines to determine whether the other party has started DMA. My program "slave receive-slave send-master receive-master send" sequence is also feasible.
3) DMA interrupt: When the data is sent to the first bit of the last byte, if you turn on the DMA send interrupt, you will enter the DMA send interrupt function. At this time, you cannot clear the flag immediately. You must query the ISR register to determine whether the remaining 7 bits of data have also been transmitted, and then determine whether the SR register is busy. Only after all are completed can you clear the flag and reconfigure the DMA data length, otherwise your subsequent data will be wrong.
4) Pull-up resistor: If you don't add pull-up resistor, you will occasionally get an error. This error cannot be seen in simulation. My simulation is correct every time, but I unplug the simulator and keep testing and find that the data is wrong. There can be 1 error in 5 restarts. After adding it, the data is abnormally stable. I don't understand why the online information does not add pull-up resistors.
5) Reset the buffer address: Since the project requires a variable-length buffer, I used malloc and free many times to allocate the buffer size, which caused the buffer address to change constantly, so I had to disable DMA and then reconfigure the DMA buffer address.
6) Host transmission process without interruption: I saw online that after the host enables DMA, it waits there to check whether the DMA has completed the transmission, which does not play the role of DMA. The frequency of SPI is 18M, and DMA is said to be about 10M. If you use the dead waiting method, it is better not to use DMA.
Therefore, if the host does not use the DMA interrupt method, two functions can be written, one to enable DMA and the other to determine whether the DMA transfer is completed. Between these two functions, the CPU can do its own thing, anyway, the host has the initiative.
It is recommended to add a three-state driver chip such as 243 for multiple slaves, which can make the SPI speed very fast and stable. If allowed, a better way is to add one to each slave to isolate it from the host, so that even if a slave has a problem, it will not affect the bus. |
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