52 timer/counter T2 register description

There are two timers T0 and T1 in the 51 series of MCUs. There is a lot of information on the Internet. The 52 MCU has one more timer T2 and 128 bytes of RAM than the 51 MCU. The function of timer T2 is more powerful than T1 and T0, but there is not much information describing it, probably because it is rarely used. It is a 16-bit timer/counter with automatic reload and capture capabilities. Its counting clock source can be the internal machine cycle or the external clock pulse input by P1.0. The function description of T2's control register is as follows:

T2CON (T2 control register), byte address0C8H：

Bit address 0CFH 0CEH 0CDH 0CCH 0CBH 0CAH    0C9H    0C8H

Symbol TF2 EXF2 RCLK TCLK EXEN2 TR2      C/T2    CP/RT2

The definitions of each are as follows:

TF2: Timer/Counter 2 overflow flag, set when T2 overflows and request an interrupt. It can only be cleared by software, but when T2 is used as a baud rate generator (i.e. RCLK=1 or TCLK=1), TF2 is not set when T2 overflows.

EXF2: When EXEN2 = 1, and a negative transition occurs on the T2EX pin (P1.0) causing T2 to be captured or reloaded, EXF2 is set and an interrupt is requested. EXF2 can only be cleared by software.

RCLK: Serial receive clock flag, which can only be set or cleared by software; used to select T1 (RCLK=0) or T2 (RCLK=1) as the serial receive baud rate generator

TCLK: serial transmission clock flag, which can only be set or cleared by software; used to select T1 (TCLK=0) or T2 (TCLK=1) as the baud rate generator for serial transmission

EXEN2: External enable flag of T2, which can only be set or cleared by software; EXEN2=0: Disable external clock to trigger T2; EXEN2=1: When T2 is not used as a serial baud rate generator, allow external clock to trigger T2. When a negative transition is input to the T2EX pin, it will cause T2 to be captured or reloaded, and set EXF2 to request an interrupt.

TR2: T2 start control flag; TR2=0: stop T2; TR2=1: start T2

C/T2: T2 timing mode or counting mode selection bit. Can only be set or cleared by software; C/T2=0: Select T2 as timer mode; C/T2=1: Select T2 as counter mode, falling edge triggered.

CP/RT2: Capture/reload flag, which can only be set or cleared by software. When CP/RT2=0, the reload mode is selected. At this time, if T2 overflows (EXEN2=0) or the T2EX pin (P1.0) has a negative transition (EXEN2=1), T2 will be reloaded; when CP/RT2=1, the capture mode is selected. At this time, if the T2EX pin (P1.0) has a negative transition (EXEN2=1), T2 capture operation will be caused. However, if RCLK=1 or TCLK=1, the CP/RT2 control bit does not work and is forced to work in the timer overflow automatic reload mode.

T2MOD (mode register), byte address0C9H：

D7     D6     D5     D4     D3     D2     D1     D0

--      --      --      --       --      --      T2OE   DCEN

T2OE: T2 output enable bit. When T2OE=1, the clock is allowed to output to P1.0. (Only for80C54/80C58 valid)

DCEN: Down-counting enable bit. DCEN=1 allows T2 to count down, otherwise it counts up.

The data registers TH2 and TL2 of T2 are used in the same way as T0 and T1, while the capture registers RCAP2H and RCAP2LOnly in the capture mode, the values ​​of TH2 and TL2 are automatically saved when a capture operation occurs.

    The above is the description of the relevant registers of T2. In fact, the usage is similar to T0 and T1, but the functions are enhanced and there are more settings. I hope it will be helpful to you.