stc12c2052ad pwm program

#include

sfr CCON =0xD8; //PCA control register
sfr CMOD =0xD9;
sfr CL =0xe9;
sfr CH =0xF9;
sfr CCAP0L=0xea; sfr
CCAP1L=0xeb;
sfr CCAP0H=0xfa;
sfr CCAP1H=0xfb;
sfr CCAPM0=0xda;
sfr CCAPM1=0xdb;

sbit CR=0xde; //Bit addressing

void main(void)
{
  CMOD=0x02; //Use system clock, clock input source frequency fosc/2. PWM frequency=fosc/2/256
            /************************************
    7 6 5 4 3 2 1 0 
   CIDL - - - cps2 CPS1 CPS0 ECF
                        
            CIDL: When =0, the PCA counter continues to work in idle mode; when =1, the PCA counter stops working in idle mode.
            CPS2, CPS1, CPS0: PCA counting pulse selection. 010, the overflow of timer 0 can realize PWM output with adjustable frequency.
             ECF: When =1, the interrupt of the CF bit in the register CCON is enabled; when =0, this function is disabled.
   ***************************************/
  CL=0x00;
  CH=0x00;
  CCAP0L= 0xc0; //When CL is less than CCAP0L, the output is low; when greater than CCAP0L, the output is high.
  CCAP0H=0x7f; //When CL changes from ff to 00 and overflows, CCAP0H is loaded into CCAP0L to achieve interference-free update of PWM.
  CCAP1L=0xc0; //When CL is less than CCAP1L, the output is low; when it is greater than CCAP1L, the output is high.
  CCAP1H=0xc0; //When CL changes from ff to 00 and overflows, CCAP1H is loaded into CCAP1L to achieve interference-free update of PWM.
  CCAPM0=0X42; //Enable PWM mode, PWM0=1, ECOM0=1
  CCAPM1=0X42; //Enable PWM mode, PWM1=1, ECOM1=1
  CR=1; //Start PCA counter
  while(1) 
  {
    CCAP0H=RF4432_TxRxBuf[4]; //Change the duty cycle here
 CCAP1H=RF4432_TxRxBuf[5];
 CCAP2H=RF4432_TxRxBuf[6]/2.5;
  };
}