The SysTick timer is bundled in the NVIC and is used to generate the SysTick exception (exception number: 15). In the past, the operating system and all systems that used a time base had to have a hardware timer to generate the required "tick" interrupt as the time base for the entire system. Tick interrupts are particularly important for operating systems. For example, the operating system can grant different numbers of time slices to multiple tasks to ensure that no task can monopolize the system; or grant a certain time range of each timer cycle to a specific task, etc., and the various timing functions provided by the operating system are all related to this tick timer. Therefore, a timer is needed to generate periodic interrupts, and it is best to prevent user programs from arbitrarily accessing its registers to maintain the rhythm of the operating system's "heartbeat".
The
Cortex-M3 processor contains a simple timer. Because all CM3 chips have this timer, software migration between different CM3 devices is simplified. The clock source of this timer can be an internal clock (FCLK, the free-running clock on the CM3) or an external clock (the
STCLK signal on the CM3 processor). However, the specific source of STCLK is determined by the chip designer, so the clock frequency between different products may vary greatly. Therefore, it is necessary to check the device manual of the chip to decide what to choose as the clock source.
The SysTick timer can generate an interrupt, and CM3 has a special exception type for it, and it has a place in the vector table. It makes the porting of operating systems and other system software between CM3 devices much simpler, because the SysTick processing method is the same in all CM3 products.
There are 4 registers controlling the SysTick timer as shown in the following table.
In addition to serving the operating system, the SysTick timer can also be used for other purposes: as an alarm, for measuring time, etc. It should be noted that when the processor is halted during debugging, the SysTick timer will also be suspended.
In the 3.5 firmware library, SysTick is defined in core_cm3.h:
static __INLINE uint32_t SysTick_Config(uint32_t ticks)
{
if (ticks > SysTick_LOAD_RELOAD_Msk) return (1);
SysTick->LOAD = (ticks & SysTick_LOAD_RELOAD_Msk) - 1;
NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1);
SysTick->VAL = 0;
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
SysTick_CTRL_TICKINT_Msk |
SysTick_CTRL_ENABLE_Msk;
return (0);
}
In the 3.5 library, it is very simple to use SysTick. Just call the SysTick_Config() function to write the reload beat number during initialization. For example, set the SysTick timer to generate an interrupt:
void Delay(u32 nTime)
{
TimingDelay = nTime;
while(TimingDelay); //Wait for Sys Tick to generate an interrupt
}
int main(void)
{
GPIO_conf();
while(1)
{
while(SysTick_Config(3600000)!=0); //72MHz frequency, reload register to one twentieth
LED_on();
Delay(10); //Delay 0.5s //Interrupt 10 times
LED_off();
Delay(10); //Delay 0.5s
}
}
Among them, TimingDelay is a global variable, which is decremented in the SysTick interrupt service routine:
void SysTick_Handler()
{
TimingDelay--;
}
The program compilation result is displayed as a 1Hz flashing light.
Keywords:STM32 Sys Tick Timer
Reference address:
STM32 Learning Road (IV) - Sys Tick Timer
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