Timer operating mode: Operating mode - T/C and output compare pin behavior - determined by waveform generation mode (WGM21:0) and compare output mode

The comparison output mode has no effect on the count sequence, while the waveform generation mode has an effect on the count sequence.

COM21:0 controls whether the PWM output is reverse polarity. In non-PWM mode, COM21:0 controls the output

The Compare Match Output Unit determines whether the bit should be set, cleared, or inverted when a compare match occurs (P113 "Compare Match Output Unit").

Normal mode: Normal mode (WGM21:0 = 0) is the simplest working mode. In this mode, the counter keeps accumulating.

After reaching the maximum value of the bit (TOP = 0xFF), the counter simply rolls over to the minimum value 0x00 due to the overflow and restarts.

In the same timer clock when TCNT0 is zero, the T/C overflow flag TOV2 is set. At this time, TOV2 is a bit like

Bit 9 can only be set but not cleared. However, since the timer interrupt service routine can automatically clear TOV2,

The timer resolution can be increased through software. In normal mode, there is nothing special to consider.

Write a new counter value at any time.

The output compare unit can be used to generate interrupts. However, it is not recommended to use the output compare to generate waveforms in normal mode because

It will take up too much CPU time.

T/C timing diagram:

8-bit T/C register description

Timer/C Control Register - TCCR2

?Bit 7 – FOC2: Forced Output Compare

FOC2 is only valid when WGM indicates non-PWM mode. However, to ensure compatibility with future devices, use

When PWM is in progress, writing TCCR2 must clear it to 0. After writing 1, the waveform generator will immediately perform a comparison operation.

The output pin OC2 will output the corresponding level according to the setting of COM21:0. Note that FOC2 is similar to a latch signal.

What really works for forced output comparison is the setting of COM21:0.

FOC2 will not cause any interrupts and will not clear the timer in CTC mode using OCR2 as TOP.

zero.

The return value of reading FOC2 is always 0.

? Bit 6, 3 – WGM21:0: Waveform generation mode

These bits control the counting sequence of the counter, the source of the counter's maximum value TOP, and what waveform is generated.

The supported modes are: normal mode, clear counter mode (CTC) when compare match occurs, and two PWM modes.

See Table 50 and P114 "Working Mode" for details.

? Bit 5:4 – COM21:0: Compare match output mode

These bits determine the level at the output pin OC0 when a compare match occurs.

OC0 works in the mode of compare match output. At the same time, its direction control bit should be set to 1 to enable output

drive.

When OC0 is connected to a physical pin, the function of COM01:0 depends on the setting of WGM01:0.

The function of COM01:0 when WGM01:0 is set to normal mode or CTC mode is shown.

2. Please pay attention when making corresponding applications

Do not assign an initial value to timer TO, otherwise the timing will be very inaccurate when the normal mode is applied.

The change of timing time can only be determined by the clock source and the frequency division coefficient

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