Understanding of ARM bootloader program

       As an embedded engineer, if you can't write a bootloader program, you can't be a real embedded engineer. When I was working as a Linux driver, I often had only a vague understanding of the bootloader program. In fact, to write a good bootloader program, you have to study the processor architecture carefully.

      ARM processor is a very popular embedded processor. Now most embedded products use ARM processor. Its low price and rich performance are favored by consumers. The following is a specific discussion of ARM bootloader program for ARM processor.

      First, let's take a brief look at ARM architecture. ARM is mainly composed of ARM core unit, vector interface, coprocessor, two caches (instruction and data), two TCMs (instruction and data), MMU, power management, etc. Cache is used to balance the speed between data, while TCM is used to store some frequently used data, such as interrupt vectors, etc. MMU mainly handles the conversion from virtual address to physical address, plays a role in protecting data, and is used in the operating system system. Obviously, the bootloader program is to provide a good operating environment for subsequent programs. Here, the necessary configuration of several components of ARM architecture is performed.

      To sum up, the ARM bootloader program mainly completes the following functions:

      1) Initialize the stack.

      2) Copying of interrupt vector table.

      3) TCM and cache configuration, if there is an operating system, MMU should be set.

      4) Establish a program execution context. (To be more specific, it is to process the image segment data according to the attributes of the image file).

      5) Perform simple tests on memory such as mddr and sram.

      6) Some peripheral devices need to be set up, generally the serial port needs to be configured.

 1. Initialize the stack:

       The stacks of irq, firq, and svc should be specified to operate the registers of these modes respectively. For example, for irq mode.

       mov  r0 ,  #0x12; irq mode

       msr  CPSR , r0; set irq mode

       ldr   sp,  =0x800;  irq steak address

2. Copying of interrupt vector table:

       Boot_Def
      ldr PC,Arm_Addr_Ini        ;0x00
      ldr PC,Arm_Addr_Und        ;0x04
      ldr PC,Arm_Addr_Swi        ;0x08
      ldr PC,Arm_Addr_Pre        ;0x0C
      ldr PC,Arm_Addr_Abt        ;0x10
      nop            ;0x14
      ldr PC,Arm_Addr_Irq        ;0x18
      ldr PC,Arm_Addr_Fiq        ;0x1C

      Arm_Addr_Ini DCD bootstrap_entry + 0x00   ;0x20
      Arm_Addr_Und DCD undefined_exception_handler  ;0x24
      Arm_Addr_Swi DCD software_interrupt_handler  ;0x28
      Arm_Addr_Pre DCD prefetch_exception_handler  ;0x2C
      Arm_Addr_Abt DCD abort_exception_handler   ;0x30
      Arm_Addr_Irq DCD irq_interrupt_handler   ;0x34
      Arm_Addr_Fiq DCD fiq_interrupt_handler   ;0x38

      DCD 0x12345678  ；   0x3c

      ...

      ldr r0,=Boot_Def
      ldr r1, =0x0 ;address 0x0
      mov r2,#0x3C
      add r2, r2, r1

0
      cmp r1, r2
      bge %b1
      ldrcc r3,[r0],#4
      strcc r3,[r1],#4
      b %B0
1

3. TCM Configuration

      There is a difference between TCM and cache. Although both are used to speed up the process, TCM must be assigned an address. The purposes of TCM and cache are also different. TCM stores commonly used data such as interrupt vector tables and realtime data, while cache is only used to speed up data processing between the processor and peripherals.

      
      ldr r0, =0x0;
      mrc p15, 0, r1, c9, c1, 1; read coprocessor instruction tcm region register.
      orr r0, r0, r1;
      mov r1, #1
      orr r1, r1, r0; instruction tcm bit_o set to 1, enable insturction tcm.
      mcr p15,0,r1,c9,c1,1; write

     Other cache configurations are similar, mainly read the ARM document.

4. Establish a program running context:

      The image (bin file) consists of two parts: RO and RW. Generally, the position of the RO part does not need to be changed before and after loading, but the RW part must be placed in RAM for execution after loading, so we map the RW part to the RAM address.

      IMPORT |Image$$RO$$Base| ;image RO 开始地址
      IMPORT |Image$$RO$$Limit|
      IMPORT |Image$$RO$$Length|
      IMPORT |Image$$RW$$Base|
      IMPORT |Image$$RW$$Limit|
      IMPORT |Image$$RW$$Length|
      IMPORT |Image$$ZI$$Base|
      IMPORT |Image$$ZI$$Limit|
      IMPORT |Image$$ZI$$Length|

      ldr r0,=|Image$$RO$$Limit|
      ldr r1,=|Image$$RW$$Base|
      ldr r2,=|Image$$RW$$Limit|
 
3
     cmp r1,r2
     bge %B3
     ldrcc r3,[r0],#4; load rw segment data from the end address of RO segment + 1
     strcc r3,[r1],#4; rewrite to rw segment
     b %B4
4

     ldr r0,=|Image$$ZI$$Base|; process ZI segment data
     ldr r1,=|Image$$ZI$$Length|
     add r1, r1, r0
     ldr r1, =0X2000
     ldr r2,=0
5
     cmp r0, r1
     bge %B6
     strcc r2,[r0],#4; initialize ZI segment data to 0
     b %B5
6

5. Test the memory:

      Since there are various types of memory in the system, a simple test of the memory can be performed.

6. UART configuration:

      UART is very important in embedded systems. Although it is simple, it is one of the necessary devices in early development. UART will be discussed in detail in the next article.