Unaligned address access in ARMv7

Publisher:少年不识愁滋味Latest update time:2016-07-25 Source: eefocusKeywords:ARMv7 Reading articles on mobile phones Scan QR code
Read articles on your mobile phone anytime, anywhere
ARMv7 supports unaligned address access by default, but there are some conditions:
CP15 system control register (SCTLR), bit.A = 0, (bit.U = 1, which is already set to 1 by default for ARMv7 and cannot be changed). 
The address space accessed must be Normal memory, and accessing Device memory or Strongly memory will trigger a Data Abort with an alignment fault. If the MMU is disabled, all memory will be treated as Strongly memory (I can't find the source of this sentence, it comes from the reply email of ARM support). So the MMU must be enabled, and the memory type is determined by C, B, TEX[2:0] of the page table entry. This part can be found in

B3.7 Memory region attributes.


Example
        MRS     r0, CPSR
        ORR     r0, r0, #(PSR_I_BIT|PSR_F_BIT)  ; Disable IRQ & FIQ
        MSR     CPSR_c, r0
; Disable MMU stuff and caches
        MRC     p15, 0, r0, c1, c0, 0           ; read control register to r0
        BIC     r0, r0, #0x000f                 ; clear W(Write buffer), C(Cache), A(Align), M(MMU) bits
        BIC     r0, r0, #0x1100                 ; clear I(ICache), S(System protection) bits
        MCR     p15, 0, r0, c1, c0, 0           ; write control register.
                
stack_setup
        LDR     r0, =|Image$$ZI$$Limit|
        ADD     r0, r0, #STACK_SIZE_SVC
                
        MSR     CPSR_c, #(MODE_SVC :OR: PSR_F_BIT :OR: PSR_I_BIT)
        MOV     sp, r0
mmu_setup        
        LDR     r2, =MMU_TABLE_BASE                             ; mmu page base address
        MCR     p15, 0, r2, c2, c0, 0           ; write mmu page base address
                
        BL      _cpu_mmu_init
        
                
        LDR     r0, =0x89
        LDRH r1, [r0]

About the Compiler

In Realview, if the target processor is ARMv6, ARMv7-A (such as Cortex-A8), or ARMv7-R, the default option of the compiler is --unaligned_access. If a version before ARMv6 or a processor of the ARMv7-M system is selected, the default option is --no_unaligned_access.

For the option --no_unaligned_access, the compiler will automatically convert the C language access to variables with unaligned addresses into several byte operations. For example:

__packed struct usb_endpoint_descriptor {
    u8 bLength;
    u16 wMaxPacketSize;
    u8 bDescriptorType;
    u8 bEndpointAddress;
    u8 bmAttributes;
    u8 bInterval;
} ;
int main(void)
{   
    volatile struct usb_endpoint_descriptor ep;
   
    ep.wMaxPacketSize = 0x200;
    while(1);
    return 0;
}
If compiled with the --no_unaligned_access option, its disassembled code is as follows:
    main
        0xe100c5f0:    e92d400c    .@-.    PUSH     {r2,r3,lr}
        0xe100c5f4:    e3a00c02    ....    MOV      r0,#0x200
        0xe100c5f8:    e5cd0001    ....    STRB     r0,[sp,#1]
        0xe100c5fc:    e1a00420     ...    LSR      r0,r0,#8
        0xe100c600:    e5cd0002    ....    STRB     r0,[sp,#2] 
        0xe100c604:    eafffffe    ....    B        0xe100c604 ; main + 20
If compiled with the --unaligned_access option, its disassembled code is as follows:
    main
        0xe100c5f0:    e92d400c    .@-.    PUSH     {r2,r3,lr}
        0xe100c5f4:    e3a00c02    ....    MOV      r0,#0x200
        0xe100c5f8:    e1cd00b1    ....    STRH     r0,[sp,#1] 
        0xe100c5fc:    eafffffe    ....    B        0xe100c5fc ; main + 12

If your target platform is ARMv6 or ARMv7-AR, but the MMU is disabled in your code, you should manually add the compilation option --no_unaligned_access to let the compiler handle unaligned access for you.

Keywords:ARMv7 Reference address:Unaligned address access in ARMv7

Previous article:ARMv8 instruction learning (1)
Next article:ARM的System Mode

Recommended ReadingLatest update time:2024-11-16 14:59

ARMv7: Linux Kernel Boot
1. If the kernel image is compressed, it needs to be decompressed. The first step of booting is to start from decompression: archarmbootcompressedhead.S 2. After decompression, the kernel image already exists in ARM. Let's start running. The kernel starts running from /arch/arm/kernel/head.S. The entry code is: 1
[Microcontroller]
Latest Microcontroller Articles
  • Download from the Internet--ARM Getting Started Notes
    A brief introduction: From today on, the ARM notebook of the rookie is open, and it can be regarded as a place to store these notes. Why publish it? Maybe you are interested in it. In fact, the reason for these notes is ...
  • Learn ARM development(22)
    Turning off and on interrupts Interrupts are an efficient dialogue mechanism, but sometimes you don't want to interrupt the program while it is running. For example, when you are printing something, the program suddenly interrupts and another ...
  • Learn ARM development(21)
    First, declare the task pointer, because it will be used later. Task pointer volatile TASK_TCB* volatile g_pCurrentTask = NULL;volatile TASK_TCB* vol ...
  • Learn ARM development(20)
    With the previous Tick interrupt, the basic task switching conditions are ready. However, this "easterly" is also difficult to understand. Only through continuous practice can we understand it. ...
  • Learn ARM development(19)
    After many days of hard work, I finally got the interrupt working. But in order to allow RTOS to use timer interrupts, what kind of interrupts can be implemented in S3C44B0? There are two methods in S3C44B0. ...
  • Learn ARM development(14)
  • Learn ARM development(15)
  • Learn ARM development(16)
  • Learn ARM development(17)
Change More Related Popular Components

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

About Us Customer Service Contact Information Datasheet Sitemap LatestNews


Room 1530, 15th Floor, Building B, No.18 Zhongguancun Street, Haidian District, Beijing, Postal Code: 100190 China Telephone: 008610 8235 0740

Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号