I2C duty cycle register setting problem-EEWORLD

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doubt:

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I2C0SCLH = (Fpclk/fi2c + 1) / 2;
I2C0SCLL = (Fpclk/fi2c)/2;
In I2C0SCLH = (Fpclk/fi2c+ 1) / 2;,

Why is it Fpclk/fi2c+1 instead of Fpclk/fi2c?
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Answer:
**************************************************************************
According to the formula: I2SCLH + I2SCLL = Fpclk / Fbit (0) Original formula

In computer number crunching, we do this:

I2SCLH = (Fpclk/Fbit + 1)/2(1)

I2SCLL = (Fpclk/Fbit)/2(2)

Then I2SCLH + I2SCLL = (Fpclk / Fbit + 1) / 2 + (Fpclk / Fbit) / 2 (3) In computer digital operations, the two items cannot be combined.

To prove that there is no problem with this, here we give an example:

Assume I2SCLH + I2SCLL = Fpclk / Fbit = 5

Only by doing this:

I2SCLH = (Fpclk / Fbit + 1) / 2 = 3

I2SCLL = (Fpclk/Fbit)/2 = 2

To ensure:

I2SCLH + I2SCLL = 5 which matches the original formula (0).

If, as stated in the question, I2SCLH + I2SCLL = (Fpclk / Fbit) / 2 + (Fpclk / Fbit) / 2 = 4, then it does not match the original formula (0)!

Keywords：I2C Reference address：I2C duty cycle register setting problem

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