UART is an asynchronous communication. For example, when a computer sends data to a microcontroller, the computer is only responsible for sending the data through TXD, and receiving the data is the responsibility of the microcontroller. I2C is a synchronous communication. The SCL clock line is responsible for the clock beat of both the sender and the receiver, and the SDA data line is responsible for transmitting data. The sender and receiver of I2C both use the SCL clock beat as the benchmark for sending and receiving data.
The I2C bus includes two signal lines, SCL and SDA, where SCL is the clock line and SDA is the data line.
1. Start signal
UART communication starts with a low level signal after a continuous high level. The start signal of I2C communication is defined as a falling edge when SDA changes from a high level to a low level during the period when SCL is at a high level, indicating a start signal.
2. Data transmission
UART has low bits first and high bits last, while I2C communication has high bits first and low bits last. UART communication data bits have a fixed length, which is one-tenth of the baud rate, and can be sent one bit at a fixed time. I2C does not have a fixed baud rate, but has timing requirements, requiring that when SCL is at a low level, SDA is allowed to change.
3. Stop signal
The stop bit of UART communication is a fixed high-level signal; while the definition of the I2C communication stop signal is that when SCL is at a high level, SDA changes from a low level to a high level to generate a rising edge, indicating the end signal.
4. After writing to the slave device, wait for the slave device's response
When the master device completes the write operation to the slave device (one byte of data each time), the master device will wait for the slave device to send an indication signal. This indication signal means that the slave device has received the data from the master device. This is done by the slave device's hardware and does not require the master device to perform software operations, only wait;
5. After the master device finishes reading the data, it sends a response signal to the slave device
This actually includes two situations. One is that the master device wants to continue reading after finishing reading, so it sends a continue reading signal (actually sending 0). The other is that it does not want to continue reading, so it sends a stop reading signal (actually sending 1).
6. I2C addressing mode
After the start signal (Start) of I2C communication, the slave address must be sent first. This address has 7 bits in total. The 8th bit is the data direction bit (R/W). "0" means that data will be sent next (write), and "1" means that data will be requested next (read). The ninth bit is ACK response.
#include
#include
#define I2CDelay() {_nop_();_nop_();_nop_();_nop_();}
sbit I2C_SCL = P3^7;
sbit I2C_SDA = P3^6;
/* Generate bus start signal */
void I2CStart()
{
I2C_SDA = 1; //First make sure SDA and SCL are both high
I2C_SCL = 1;
I2CDelay();
I2C_SDA = 0; // Pull SDA low first
I2CDelay();
I2C_SCL = 0; //Pull SCL low again
}
/* Generate bus stop signal */
void I2CStop()
{
I2C_SCL = 0; //First make sure that SDA and SCL are both low
I2C_SDA = 0;
I2CDelay();
I2C_SCL = 1; //Pull SCL high first
I2CDelay();
I2C_SDA = 1; //Pull SDA high again
I2CDelay();
}
/* I2C bus write operation, dat-byte to be written, return value-slave response bit value */
bit I2CWrite(unsigned char dat)
{
bit ack; //Used to temporarily store the value of the response bit
unsigned char mask; //Mask variable used to detect a certain bit value in a byte
for (mask = 0x80; mask != 0; mask >>= 1) //From high to low
{
if ((mask & dat) == 0) //The value of this bit is output to SDA
{
I2C_SDA = 0;
}
else
{
I2C_SDA = 1;
}
I2CDelay();
I2C_SCL = 1; //Pull SCL high
I2CDelay();
I2C_SCL = 0; //Pull SCL low again to complete a bit cycle
}
I2C_SDA = 1; //After sending 8 bits of data, the host releases SDA to detect the slave's response
I2CDelay();
I2C_SCL = 1; //Pull SCL high
ack = I2C_SDA; //Read the SDA value at this time, which is the response value of the slave
I2CDelay();
I2C_SCL = 0; //Pull SCL low again to complete the response bit and hold the bus
return (~ack); //The response value is inverted to conform to the usual logic:
//0 = does not exist or is busy or write failed, 1 = exists and is idle or write succeeded
}
/* I2C bus read operation, and send a non-response signal, return value - the read byte */
unsigned char I2CReadNAK()
{
unsigned char mask;
unsigned char dat;
I2C_SDA = 1; //First make sure the host releases SDA
for (mask = 0x80; mask != 0; mask >>= 1) //From high to low
{
I2CDelay();
I2C_SCL = 1; //Pull SCL high
if(I2C_SDA == 0) //Read the value of SDA
{
dat &= ~mask; //When it is 0, the corresponding bit in dat is cleared
}
else
{
dat |= mask; //When it is 1, the corresponding position in dat is 1
}
I2CDelay();
I2C_SCL = 0; //Pull SCL low again to allow the slave to send the next bit
}
I2C_SDA = 1; //After sending 8 bits of data, pull up SDA to send a non-response signal
I2CDelay();
I2C_SCL = 1; //Pull SCL high
I2CDelay();
I2C_SCL = 0; //Pull SCL low again to complete the non-acknowledge bit and hold the bus
return dat;
}
/* I2C bus read operation, send response signal, return value - read byte */
unsigned char I2CReadACK()
{
unsigned char mask;
unsigned char dat;
I2C_SDA = 1; //First make sure the host releases SDA
for (mask = 0x80; mask != 0; mask >>= 1) //From high to low
{
I2CDelay();
I2C_SCL = 1; //Pull SCL high
if(I2C_SDA == 0) //Read the value of SDA
{
dat &= ~mask; //When it is 0, the corresponding bit in dat is cleared
}
else
{
dat |= mask; //When it is 1, the corresponding position in dat is 1
}
I2CDelay();
I2C_SCL = 0; //Pull SCL low again to allow the slave to send the next bit
}
I2C_SDA = 0; //After sending 8 bits of data, pull SDA low to send a response signal
I2CDelay();
I2C_SCL = 1; //Pull SCL high
I2CDelay();
I2C_SCL = 0; //Pull SCL low again to complete the response bit and hold the bus
return dat;
}
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