ARM assembly instructions MCR/MRC learning

Grammar teaching format:

MCR{} p15, 0, , , {,}

MCR2 p15, 0, , , {,}

is the condition code for the instruction to run. When is ignored, the instruction runs unconditionally. In MCR2, is Ob1, and the instruction runs unconditionally.

  is the opcode of the operation that the coprocessor will perform.

For the CP15 coprocessor, is always 0b. When is not 0b, the result of the instruction operation is unpredictable.

  is an ARM register used as a meta-register. Its value is transferred to the coprocessor register.

  cannot be PC. When it is PC, the result of the instruction operation is unpredictable.

  is the coprocessor register used as the target register, which may be numbered C0, C1....C15.

is an additional target register or an original operand register. It is used to distinguish different physical registers with the same number. When no additional information is required in the instruction, C0 is specified as , otherwise the result of the instruction operation is unpredictable. provides additional information to distinguish different physical registers with the same number. When additional information is specified in the instruction, is omitted or specified as 0, otherwise the result of the instruction operation is unpredictable.

The MRC instruction transfers the value in the coprocessor register to the ARM processor register. If the coprocessor cannot successfully execute the operation, an undefined instruction exception interrupt will be generated.

The syntax format of the command is:

MRC{} p15, 0, , , {,}

MRC2 p15, 0, , , {,}