Q: Do I need to make any special settings in my firmware to take advantage of the Harvard architecture and five-stage pipeline in ARM9?
A: No. First, the ARM966E core of STR9 is binary compatible with ARM7, that is, ARM7 code can run on STR9 without modification. Any third-party compiler that supports STR9 can generate code for ARM7 or ARM966E; when STR9 (or ARM966E) is specified, the compiler will automatically generate code that takes advantage of the Harvard architecture and five-stage pipeline of ARM966E. Firmware engineers do not need to do anything special for this.
Q: From which FLASH of the dual FLASH memories does the CPU boot (bootstrap)?
A: The CPU can boot from either FLASH memory. The CPU boots from the larger FLASH by default, but this can be changed using ST's CAPS tool software or the IDE of a third-party tool vendor. Specifying which FLASH to boot from is implemented through JTAG programming, and this setting will not change due to power failure unless the chip is erased.
Q: Can the FLASH memory be used as data memory?
A: Yes. Any FLASH memory can be read and written as data memory. The smaller FLASH memory is organized into four sectors, each with 8K bytes. Using appropriate software techniques, these FLASH sectors can be simulated as EEPROM memory, which can effectively break the 100K erase and write limit of FLASH through simulation. This will potentially save an external EEPROM memory.
Q: Does the USB interface have a specific buffer? How many endpoints can it support?
A: Yes, the USB interface (certified and publicized by USB.org) has a 2K-byte dual-port SRAM packet buffer that implements a double-buffer algorithm in synchronous and block transfers. The USB interface has 20 unidirectional or 10 bidirectional ports; it also supports USB standby/wake-up operations.
Q: Please give an example of how to use the intrusion detection pins in a product
A: For example, when STR9 is used in a portable point-of-sale terminal, the SRAM is likely to store sensitive information, such as credit card information; the intrusion detection pin can detect whether the device's shell is opened through a switch. When the shell is opened, the sensitive information in the SRAM will be destroyed immediately, and the RTC will record the time of the event in its memory.
Q: What are the program code limits for the various starter kits?
A: Except for the IAR kit, which has a code limit of 32K bytes, the code limit for all other kits is 16K bytes.
Q: How many pins are required for the ETM instruction trace interface? Can these pins be used for other purposes after debugging is completed?
A: The ETM interface uses nine pins. When instruction trace debugging is not required, these nine pins can be used for other functions.
Q: Is there a special place in the memory to store the Ethernet MAC address?
A: Yes. There is a 30-byte one-time programmable memory in the STR9. Data can only be written once and can never be erased or rewritten. These bytes can be programmed by the CPU or JTAG. A typical usage is to store information such as MAC address, serial number, calibration constants, product ID number, etc. in this 30-byte memory.
Q: STR9 will have up to 2 megabytes of basic FLASH memory, why is the second FLASH memory also large, reaching 128K bytes?
A: The larger second FLASH memory can accommodate complex bootstrap startup programs, such as firmware updates from remote FLASH memory. In such a large memory, perhaps you can include more functions, such as error correction and retransmission, encryption algorithms, and even firmware updates through different channels (Ethernet, USB, CAN, UART or SPI). On the other hand, this 128K bytes of memory can be used to store application programs, while the 2 megabytes of memory can be used to store large amounts of data, such as a Chinese character library in a small printer product.
Q: What is the DFU protocol in USB?
A: DFU is a complete USB protocol. DFU stands for "DEVICE Firmware Upgrade". Following this agreement, ST provides a PC program that coordinates with the DFU driver of the second FLASH memory in STR9. Users can download firmware programs from the PC to the basic FLASH memory of STR9, or read binary code from the basic FLASH memory of STR9.
Q: Can the USB interface be a USB host?
A: This USB interface is a full-speed device and cannot be a USB host.
Q: What is the minimum erase unit of the FLASH memory in this chip?
A: The FLASH memory is written in 16-bit units, but can only be erased in units of a single sector or a whole block of FLASH. The second FLASH memory has four sectors, each of which is 8K bytes in size. Each sector of the basic FLASH memory is 64K bytes in size. There are eight 64KB sectors in the 256K-byte product and 16 64KB sectors in the 512K-byte product. The two FLASH storage areas are independent, and the CPU can read the other FLASH memory while erasing or writing one FLASH.
Q: Do the 1MB and 2MB versions of the extended memory also appear in STR910 and STR911?
A: The 1MB and 2MB versions will be extended to STR911, but not STR910. However, STR911 and STR912 are available in various packages that are pin-compatible with STR910, so customers can easily choose products based on their storage capacity needs.
Q: Can programs run on external memory?
A: Of course. If your FLASH or SRAM is connected to the external memory interface, the CPU can directly run programs on these external memories.
Q: Can the firmware program support in-process programming (IAP) via RS232?
A: Because there are two FLASH memories in the chip, you can implement in-process programming through any peripheral. Please visit ST's website, we have an application note that explains how to implement IAP via UART on STR9.
Q: How many CAN interfaces does STR9 have?
A: All STR9 chips have a CAN 2.0B interface.
Q: The ADC conversion time of 0.7us, is it the time for each channel or the conversion time for all channels on the chip?
A: When the ADC clock is 25MHZ, each ADC channel requires 0.7us conversion time; this time includes the time for sampling, conversion and data transfer on one ADC input channel.
Q: Although this chip does not have an MMU, can it run Linux?
A: uCLinux can run in an environment without an MMU, and uCLinux can run on STR9. However, ST does not provide a uCLinux board support package for STR9.
Q: Can the backup battery be used to use the SRAM of STR9 as a non-power-down SRAM?
A: Of course. If the SRAM backup battery option is selected when STR9 is initialized, all SRAM contents will not be lost when the CPU is powered off. To save all 96K bytes of content in SRAM, only 5uA of current is consumed from the backup battery at room temperature.
Q: What are the ideal applications for this series of products? Do you have a specific direction for implementation? What do you think are the best applications?
A: This is a very general microcontroller with many carefully configured devices on the chip, making it ideal for many applications. At the same time, I think it can do well in some areas, embedded network control is an ideal application area. The integration of Ethernet MAC and huge SRAM in a very small package is very suitable for embedded products that need to connect to the local area network at a low cost, which was almost impossible to achieve before due to cost reasons. Other features that I think are worth noting are low power mode and backup battery mode, which are very suitable for portable products such as handheld sales terminals and test and measurement instruments. The numerous communication channels and a large number of I/O ports just meet the needs of building and industrial automation equipment. If you consider the large capacity of SRAM and FLASH, the DSP instructions of the ARM966E and the high-speed ADC, medical and communication equipment appear in our field of vision. This chip can be used in a very wide range of applications, but I think the most important feature is the Ethernet MAC, which expands the application field into embedded network environments.
Q: What is the maximum operating frequency of the on-chip GPIO?
A: The maximum operating frequency of the GPIO is 12MHZ.
Q: Do all kits have the same functionality?
A: From a hardware perspective, all starter kits have similar functionality, because the main communication channels of the STR9 are accessible on each kit. The differences are some additional peripheral configurations, such as LCD, SD card interface, audio interface, etc. The main difference between the different kits is the use of different integrated development environments and C compilers, which are provided by different manufacturers; some kits use open source compilers, while others use their own specific compilers.
Q: Which JTAG programming adapter does the CAPS software use?
A: CAPS supports Raisonance's RLINK JTAG interface and ST's FLASHLINK JTAG interface, both of which cost $59. These programming interfaces are suitable for the needs of programming STR9 in small and medium-sized production lines. Q
: What are your expectations for the life cycle of the STR9 series microcontrollers?
A: These devices are targeted at industrial applications. ST is well aware that products in industrial applications have a fairly long life cycle, and our products meet this need.
Q: How can the program in the on-chip FLASH be effectively protected from being illegally read out?
A: After development is complete, there is a security bit that can only be set through the JTAG interface. Once the security bit is set, no content in the FLASH memory can be read through the external JTAG interface, and the JTAG debugging function is also invalid. The only way to clear the security bit is to erase the entire STR9 memory through the JTAG interface, so that an empty device can be used again.
Q: The CPU can read the contents of the program storage area as data. Does this mean that the code in the FLASH memory can be self-tested when the system is powered on?
A: Yes. The best way to achieve this function is to start from the smaller FLASH area in the STR9, where there is code to verify the larger FLASH storage area. When the code verification succeeds, the CPU can switch to execute the code in the larger FLASH storage area; otherwise, the CPU can execute the program update code and refresh the code in the FLASH storage area through any STR9 communication channel.
Q: Is assembly support included in the evaluation kit? Is there a code size limit?
A: Assembly support is part of the integrated development environment (IDE). I believe all IDEs allow you to write programs in C or assembly. The code size limit for assembly programs is the same as that for C programs.
Q: Can the STR9's DSP be used for acoustic wave inversion?
A: We don't have much experience yet, and we don't know which applications are suitable, but we are impressed by the evaluation results of the STR9's DSP functions; for example, the STR9 only took 714us to complete a 1024-point fast Fourier transform (FFT).
Q: Can the STR9 be configured to interface with an SD memory card or NAND flash memory?
A: There is no dedicated interface, but it can be achieved through GPIO connection.
Keywords:STR910
Reference address:STR910 FAQ
A: No. First, the ARM966E core of STR9 is binary compatible with ARM7, that is, ARM7 code can run on STR9 without modification. Any third-party compiler that supports STR9 can generate code for ARM7 or ARM966E; when STR9 (or ARM966E) is specified, the compiler will automatically generate code that takes advantage of the Harvard architecture and five-stage pipeline of ARM966E. Firmware engineers do not need to do anything special for this.
Q: From which FLASH of the dual FLASH memories does the CPU boot (bootstrap)?
A: The CPU can boot from either FLASH memory. The CPU boots from the larger FLASH by default, but this can be changed using ST's CAPS tool software or the IDE of a third-party tool vendor. Specifying which FLASH to boot from is implemented through JTAG programming, and this setting will not change due to power failure unless the chip is erased.
Q: Can the FLASH memory be used as data memory?
A: Yes. Any FLASH memory can be read and written as data memory. The smaller FLASH memory is organized into four sectors, each with 8K bytes. Using appropriate software techniques, these FLASH sectors can be simulated as EEPROM memory, which can effectively break the 100K erase and write limit of FLASH through simulation. This will potentially save an external EEPROM memory.
Q: Does the USB interface have a specific buffer? How many endpoints can it support?
A: Yes, the USB interface (certified and publicized by USB.org) has a 2K-byte dual-port SRAM packet buffer that implements a double-buffer algorithm in synchronous and block transfers. The USB interface has 20 unidirectional or 10 bidirectional ports; it also supports USB standby/wake-up operations.
Q: Please give an example of how to use the intrusion detection pins in a product
A: For example, when STR9 is used in a portable point-of-sale terminal, the SRAM is likely to store sensitive information, such as credit card information; the intrusion detection pin can detect whether the device's shell is opened through a switch. When the shell is opened, the sensitive information in the SRAM will be destroyed immediately, and the RTC will record the time of the event in its memory.
Q: What are the program code limits for the various starter kits?
A: Except for the IAR kit, which has a code limit of 32K bytes, the code limit for all other kits is 16K bytes.
Q: How many pins are required for the ETM instruction trace interface? Can these pins be used for other purposes after debugging is completed?
A: The ETM interface uses nine pins. When instruction trace debugging is not required, these nine pins can be used for other functions.
Q: Is there a special place in the memory to store the Ethernet MAC address?
A: Yes. There is a 30-byte one-time programmable memory in the STR9. Data can only be written once and can never be erased or rewritten. These bytes can be programmed by the CPU or JTAG. A typical usage is to store information such as MAC address, serial number, calibration constants, product ID number, etc. in this 30-byte memory.
Q: STR9 will have up to 2 megabytes of basic FLASH memory, why is the second FLASH memory also large, reaching 128K bytes?
A: The larger second FLASH memory can accommodate complex bootstrap startup programs, such as firmware updates from remote FLASH memory. In such a large memory, perhaps you can include more functions, such as error correction and retransmission, encryption algorithms, and even firmware updates through different channels (Ethernet, USB, CAN, UART or SPI). On the other hand, this 128K bytes of memory can be used to store application programs, while the 2 megabytes of memory can be used to store large amounts of data, such as a Chinese character library in a small printer product.
Q: What is the DFU protocol in USB?
A: DFU is a complete USB protocol. DFU stands for "DEVICE Firmware Upgrade". Following this agreement, ST provides a PC program that coordinates with the DFU driver of the second FLASH memory in STR9. Users can download firmware programs from the PC to the basic FLASH memory of STR9, or read binary code from the basic FLASH memory of STR9.
Q: Can the USB interface be a USB host?
A: This USB interface is a full-speed device and cannot be a USB host.
Q: What is the minimum erase unit of the FLASH memory in this chip?
A: The FLASH memory is written in 16-bit units, but can only be erased in units of a single sector or a whole block of FLASH. The second FLASH memory has four sectors, each of which is 8K bytes in size. Each sector of the basic FLASH memory is 64K bytes in size. There are eight 64KB sectors in the 256K-byte product and 16 64KB sectors in the 512K-byte product. The two FLASH storage areas are independent, and the CPU can read the other FLASH memory while erasing or writing one FLASH.
Q: Do the 1MB and 2MB versions of the extended memory also appear in STR910 and STR911?
A: The 1MB and 2MB versions will be extended to STR911, but not STR910. However, STR911 and STR912 are available in various packages that are pin-compatible with STR910, so customers can easily choose products based on their storage capacity needs.
Q: Can programs run on external memory?
A: Of course. If your FLASH or SRAM is connected to the external memory interface, the CPU can directly run programs on these external memories.
Q: Can the firmware program support in-process programming (IAP) via RS232?
A: Because there are two FLASH memories in the chip, you can implement in-process programming through any peripheral. Please visit ST's website, we have an application note that explains how to implement IAP via UART on STR9.
Q: How many CAN interfaces does STR9 have?
A: All STR9 chips have a CAN 2.0B interface.
Q: The ADC conversion time of 0.7us, is it the time for each channel or the conversion time for all channels on the chip?
A: When the ADC clock is 25MHZ, each ADC channel requires 0.7us conversion time; this time includes the time for sampling, conversion and data transfer on one ADC input channel.
Q: Although this chip does not have an MMU, can it run Linux?
A: uCLinux can run in an environment without an MMU, and uCLinux can run on STR9. However, ST does not provide a uCLinux board support package for STR9.
Q: Can the backup battery be used to use the SRAM of STR9 as a non-power-down SRAM?
A: Of course. If the SRAM backup battery option is selected when STR9 is initialized, all SRAM contents will not be lost when the CPU is powered off. To save all 96K bytes of content in SRAM, only 5uA of current is consumed from the backup battery at room temperature.
Q: What are the ideal applications for this series of products? Do you have a specific direction for implementation? What do you think are the best applications?
A: This is a very general microcontroller with many carefully configured devices on the chip, making it ideal for many applications. At the same time, I think it can do well in some areas, embedded network control is an ideal application area. The integration of Ethernet MAC and huge SRAM in a very small package is very suitable for embedded products that need to connect to the local area network at a low cost, which was almost impossible to achieve before due to cost reasons. Other features that I think are worth noting are low power mode and backup battery mode, which are very suitable for portable products such as handheld sales terminals and test and measurement instruments. The numerous communication channels and a large number of I/O ports just meet the needs of building and industrial automation equipment. If you consider the large capacity of SRAM and FLASH, the DSP instructions of the ARM966E and the high-speed ADC, medical and communication equipment appear in our field of vision. This chip can be used in a very wide range of applications, but I think the most important feature is the Ethernet MAC, which expands the application field into embedded network environments.
Q: What is the maximum operating frequency of the on-chip GPIO?
A: The maximum operating frequency of the GPIO is 12MHZ.
Q: Do all kits have the same functionality?
A: From a hardware perspective, all starter kits have similar functionality, because the main communication channels of the STR9 are accessible on each kit. The differences are some additional peripheral configurations, such as LCD, SD card interface, audio interface, etc. The main difference between the different kits is the use of different integrated development environments and C compilers, which are provided by different manufacturers; some kits use open source compilers, while others use their own specific compilers.
Q: Which JTAG programming adapter does the CAPS software use?
A: CAPS supports Raisonance's RLINK JTAG interface and ST's FLASHLINK JTAG interface, both of which cost $59. These programming interfaces are suitable for the needs of programming STR9 in small and medium-sized production lines. Q
: What are your expectations for the life cycle of the STR9 series microcontrollers?
A: These devices are targeted at industrial applications. ST is well aware that products in industrial applications have a fairly long life cycle, and our products meet this need.
Q: How can the program in the on-chip FLASH be effectively protected from being illegally read out?
A: After development is complete, there is a security bit that can only be set through the JTAG interface. Once the security bit is set, no content in the FLASH memory can be read through the external JTAG interface, and the JTAG debugging function is also invalid. The only way to clear the security bit is to erase the entire STR9 memory through the JTAG interface, so that an empty device can be used again.
Q: The CPU can read the contents of the program storage area as data. Does this mean that the code in the FLASH memory can be self-tested when the system is powered on?
A: Yes. The best way to achieve this function is to start from the smaller FLASH area in the STR9, where there is code to verify the larger FLASH storage area. When the code verification succeeds, the CPU can switch to execute the code in the larger FLASH storage area; otherwise, the CPU can execute the program update code and refresh the code in the FLASH storage area through any STR9 communication channel.
Q: Is assembly support included in the evaluation kit? Is there a code size limit?
A: Assembly support is part of the integrated development environment (IDE). I believe all IDEs allow you to write programs in C or assembly. The code size limit for assembly programs is the same as that for C programs.
Q: Can the STR9's DSP be used for acoustic wave inversion?
A: We don't have much experience yet, and we don't know which applications are suitable, but we are impressed by the evaluation results of the STR9's DSP functions; for example, the STR9 only took 714us to complete a 1024-point fast Fourier transform (FFT).
Q: Can the STR9 be configured to interface with an SD memory card or NAND flash memory?
A: There is no dedicated interface, but it can be achieved through GPIO connection.
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