A brief discussion on timers in ARM

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The LPC21XX/22XX has two 32-bit timers: Timer 0 and Timer 1. These two timers are identical except for the peripheral base address. They have the following features:

1. Two 32-bit timer/counters, each with a programmable 32-bit prescaler.

2. With up to 4 capture channels, the instantaneous value of the timer can be obtained when the input signal jumps, and the capture event can also be selected to generate an interrupt.

3.4 32-bit match registers. There are three actions when matching: A. The timer continues to work when matching, and an interrupt can be generated; B. Stop the timer when matching, and an interrupt can be generated; C. Reset the timer when matching, and an interrupt can be generated.

4.4 The external outputs corresponding to the match registers have the following four outputs when matching: A is set to low level when matching, B is set to high level when matching; C is flipped when matching; D is no action when matching.

 

The clock source of the timer is PCLK, and the workflow is as follows:

1. The prescaler inside the timer divides the timer clock source;

2. After frequency division, the output clock is the clock source of the counter inside the timer; therefore, the prescaler plays the role of converting the clock frequency;

3. The count value is constantly compared with the match register. When the two are equal, a match event occurs, and then the corresponding operation is performed - an interrupt is generated, the match output pin (MAT) outputs a specified signal, etc.

4. When a valid edge appears on the capture pin, the timer will save the current count value to the capture register and can also generate an interrupt.

 

Therefore, we can see that the timer in ARM is mainly composed of three parts: counter part, matching function part, and capture function part. Therefore, the registers are also divided into basic register group, matching function register group and capture function register group.

The basic register group is mainly for the basic counter function, including the interrupt flag register IR, the timer control register TCR, the timer counter TC, the prescaler register PR, and the prescaler counter PC.

The match register group is mainly for the matching function of the timer, including: match registers MR0-3, match control register MCR and external match register EMR.

The capture function register group is for the capture function of the timer, including: capture register and capture control register. The capture register is used to set the capture signal. When a capture event occurs, the count value of the timer is saved in the capture register.

Keywords:ARM  Timer Reference address:A brief discussion on timers in ARM

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