ARM architecture MMU, storage manager function notes-EEWORLD

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1. The ARM processor does not enable MMU and only uses the running process of the storage manager

When the CPU accesses memory devices such as the network card, SDRAM, NAND FLASH, NOR FLASH, etc., it will first send the physical address to be accessed to the storage manager (the CPU only knows to send the address and does not care what device the address corresponds to). The storage manager finds the corresponding device based on the physical address value, and sends the chip select enable signal, BANK address, row address, column address, refresh frequency, bit width, etc. to the corresponding device, obtains the value of the corresponding physical address and sends it to the CPU, thereby completing the read and write access to the corresponding device.

2. The operation process of enabling MMU and storage manager in ARM processor

First, we need to create a page table, map the virtual address to the real physical address, and tell the MMU the first address of the page table header;

When the CPU accesses memory devices such as the network card, SDRAM, NAND FLASH, NOR FLASH, etc., it first sends the virtual address to be accessed to the MMU unit. The MMU finds the corresponding physical address in the page table based on the virtual address, and then sends the obtained physical address to the storage manager. The storage manager finds the corresponding device based on the physical address value, and sends the chip select enable signal, BANK address, row address, column address, refresh frequency, bit width, etc. to the corresponding device, obtains the corresponding physical address value and sends it to the CPU, thereby completing the read and write access to the corresponding device.

Reference address：ARM architecture MMU, storage manager function notes

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