Software and hardware design of serial port bridge based on ARM microprocessor and embedded Linux

1. Introduction

In the fields of power system automation control and other industrial control, civil equipment such as shopping mall sales systems, etc., the external communication interface of many devices is still a low-speed serial port. The serial port has been popular for its ease of use, reliability and high enough communication capability relative to industrial control equipment. However, a major weakness of the serial port is that the transmission distance is short and it cannot be directly connected to the network, which makes it impossible for the equipment to achieve remote control and data sharing, which are precisely the necessary conditions for achieving highly automated industrial control. Therefore, it is required to design a device that enables serial port devices to quickly and conveniently realize networking functions, and it is required to be low-cost. We call it a serial port bridge or a serial port device networking server.

2. Introduction to Serial Port Bridge

The serial port bridge we designed is a device networking server that can provide networking capabilities for RS-232 serial port devices. The device mainly completes the filtering and forwarding functions of the communication data between the host and the serial port device, converts the RS-232 signal into the TCP/IP protocol, so that the device data can be circulated and shared on the Internet or Intranet. The specific functions of the prison door bridge are described as follows:

● The (remote or local) host can read data from the serial device remotely, process data and transmit data to multiple points through the TCP/IP network just like operating the local serial port. That is, the original host application of the serial device can be reused without any modification.

●Supports host to log in and modify configuration via Web and Telnet;

●IP address can be set directly on the bridge device;

●Automatically detect 10/100Mbps Ethernet network;

● Can operate 8 serial port devices at the same time. Serial port bridge devices are widely used in many fields such as industrial equipment networking automation, access control and attendance management, shopping mall sales system networking automation, remote image transmission, etc. Its typical application is shown in Figure 1:

3. System hardware structure

The hardware structure schematic diagram of the serial port bridge is shown in Figure 2:

The basic components of each main module are described as follows:

● Each microprocessor MCU: uses the ARM7TDMI core S3C4510B processor produced by SAMISUNG;

● 1 0/100M Ethernet interface: An RTL8201 and the MAC controller in the S3C4510B chip form an Ethernet interface circuit, and are connected to the RJ45 Ethernet port through a network isolation transformer;

●FLASH memory: A 39VFl60
Flash memory with a size of 2M bytes is used to store
debugged user applications, embedded operating systems, and other user data that
needs to be saved after the system loses power ; [page]

● SDRAM memory: Two HY57V641620HG chips are connected in parallel to build a 32-bit SDRAM memory system, totaling 16M bytes, which can meet the operating requirements of embedded operating systems and various relatively complex algorithms;

●JTAG interface: can access all components inside the chip, and can be used to debug and program the system;

●Multi-serial port expansion: Use two ST16C554 chips to expand eight serial ports to connect multiple serial port devices at the same time.

The following is a brief analysis of the functions of the main modules in the device hardware structure.

3.1 ARM microprocessor S3C4510B

The core of the serial bridge system is a S3C45l0B-16/32-bit RI5C (Reduced Instruction Set Computer) microcontroller produced by Samsung Electronics of South Korea. This microcontroller is designed for hubs and routers in Ethernet communication systems and has the characteristics of low cost and high performance.

The S3C4510B has a built-in 16/32-bit ARM7TDMI processor designed by ARM, provides 8K bytes of cache and Ethernet controller, built-in 2-channel HDLC (High-Level Data Link Control), 2 UART (Universal Asynchronous Receiver/Transmitter) channels, built-in 32-bit timer and 18 general-purpose programmable I/O ports. The S3C4510B uses a 32-bit system bus, has an I2C interface, and also integrates an interrupt controller, DRAM/SDRAM controller, ROM/SRAM and flash memory controller. The above functions and features are all integrated in this single chip, which can greatly reduce the system cost. In terms of software, the S3C4510B can execute 32-bit ARM instructions and 16-bit THUMB instructions because it has a built-in ARSM7TDMI core.

The S3C4510B is powered by 3.3V, has a 208-pin QFP package, and operates at a maximum frequency of 50MHz.

3.2 10/100M Ethernet interface circuit

The S3C4510B has an embedded Ethernet controller that supports Media Independent Interface (UII) and Buffered DMA Interface (BDI), and can provide 10/100Mbps Ethernet access in half-duplex or full-duplex mode. In half-duplex mode, the controller supports CSMA/CD protocol, and in full-duplex mode, it supports IEEE802.3 MAC control layer protocol.

However, S3C4510B does not provide a physical layer interface, so an external physical layer chip is required to provide an Ethernet access channel. Common single-port 10/100Mbps high-speed Ethernet physical layer interface devices include RTL8201, DM9161, etc., which provide MII interface and traditional 7-wire network interface and can be easily connected to S3C4510B. RTL8201 is used as the physical layer interface of Ethernet in the design of the serial port bridge.

3.3 Flash memory interface circuit

Flash memory has the characteristics of low power consumption, large capacity, fast erasing speed, and can be programmed (burned) and erased in the system in whole or in sectors, so it has been widely used in various embedded systems. As a non-volatile memory, Flash is usually used to store program code and some user data that needs to be saved after the system power is off. A 39VFl60 FLASH memory is used in the system, with a single-chip storage capacity of 16M bits (2M bytes), an operating voltage of 2.7V~3.6V, a 48-pin TSOP package or a 48-pin FBGA package, and a 16-bit data width.

39VF160 only needs a single 3V voltage to complete the programming and erasing operations in the system. By writing a standard command sequence into its internal command register, the Flash can be programmed (burned), erased as a whole, erased by sector, and other operations.

3.4 SDRAM interface circuit

SDPAM is mainly used as the program running space, data and stack in the system. When the system starts
, the CPU first reads the startup code from the reset address. After completing the system initialization, the program code should generally be transferred to SDRAM to run in order to increase the system's running speed. At the same time, the system stack, user stack and running data are also placed in SDRAM.

To use SDRAM in a system, the microprocessor must have refresh control logic, or a refresh control logic circuit must be added to the system. S3C4510B and some other ARM chips have independent SDRAM refresh control logic on the chip, which can be easily connected to SDRAM.

HY57V641620HG has a 16-bit data width and a single-chip capacity of 8M bytes. In order to give full play to the data processing capability of the 32-bit CPU, two HY57V641620HG chips are connected in parallel to form a 32-bit SDRAM memory system in the serial port bridge design. The total 16M bytes of SDRAM space can meet the operating requirements of embedded operating systems and various relatively complex algorithms.

3.5 JTAG interface circuit

JTAG (Joint Test Action Group) is an international standard test protocol, mainly used for internal chip testing and system simulation and debugging. JTAG technology is an embedded debugging technology that encapsulates a special test circuit inside the chip, and can test the internal nodes of the chip through dedicated JTAG test software. Currently, most of the more complex devices support the JTAG protocol, such as ARM, DSP, FPGA devices, etc. The JTAG interface is often used to implement ISP (In-System Programmable) functions, such as programming FLASH devices. Through the JTAG interface, all components inside the chip can be accessed, so it is a simple and efficient means to develop and debug embedded systems.

3.6 Multiple serial port expansion

The serial bridge provides eight standard RS232 serial ports to connect multiple serial devices. Of course, S3C4510B cannot provide so many serial ports, so we need to expand it ourselves.

The principle of multi-serial port expansion is shown in Figure 3.

STl6C554 is an integrated asynchronous communication element. Each 16C554 contains four improved 16C350 asynchronous transmission devices. Each channel has an independent 16-byte receive buffer and 16-byte transmit buffer, which can achieve a higher communication rate without occupying too much CPU resources.

Maxim's MAX202 chip is a standard RS232 level converter and an interface chip that complies with the RS232 communication standard. The chip has low power consumption, high integration, and uses a single 5V power supply. Each chip has 2 drivers and 2 receivers, and has 2 sets of receiving and transmitting channels. The interface circuit is simple and has high reliability. It can realize direct conversion between TTL level and RS232 level.

The serial port data signal is converted into TTL level by MAX202, and then outputs interrupt request by ST16C554. The interrupt request of eight serial ports generates IRQ signal INTREQ, which is connected to the interrupt controller of CPU through CPLD.

The main purpose of using CPLD in the design is to solve the problem of interrupt overlap that is bound to occur when multiple serial ports share one interrupt source. To improve reliability, the eight serial ports in the system all use interrupts to process data, and the eight serial ports share one interrupt source. In the shared interrupt service program, the program performs a data check on the eight serial ports in sequence. If a serial port is found to have data, it will be processed accordingly. However, this will cause the following problems: for example, the interrupt service program has just detected serial port 1 and found no data, so it turns to serial port 2 for detection and finds that serial port 2 has data, so the program will process the data of serial port 2. If an interrupt request occurs on serial port 1 at this time, the interrupt request of serial port 1 will be ignored because the CPU cannot save the request pulse. [page]

In order to solve this problem, a logic circuit implemented by CPLD can be added behind the shared interrupt source. The logic circuit consists of two parts. The first part is an addressable register INTEN, which serves as the enable bit of the shared interrupt. The second part is a state machine logic circuit, which has three states: S0 is the waiting state, in which INTEN=1. As long as any serial port generates an interrupt request, the CPU will respond to the interrupt immediately; S1 is the interrupt service state. When the interrupt service program starts to execute, INTEN is immediately set to 0 to shield other interrupt requests. When exiting the interrupt service program, INTEN is set to 1 again. The serial port interrupt request generated during the execution of the interrupt service program is latched by INTREQ; S2 is the delay state, which is 50us to ensure that the interrupt service program is completely exited.

The state diagram of the state machine logic circuit is shown in Figure 4:

4. System software platform

4.5 Introduction to uC1inux Operating System

Linux is a very popular UNIX-like operating system. It is free and open source, and is widely used in personal computers and servers. More importantly, Linux adopts a modular design and can be customized in actual applications, so Linux is also suitable for embedded fields. uClinux is an embedded version of Linux, and its kernel binary image file can be less than 512K.

uClinux is designed for processors without MMU (Memory Management Unit), supports multi-tasking, has a complete TCP/IP protocol stack and supports multiple network protocols. uClinux also supports multiple file systems, such as ROMFS, NFS, FATl6/32. In fact, uClinux has been successfully applied to routers, network cameras, set-top boxes, PDAs and many other fields.

In addition, uClinux is highly portable, and users can easily port it to various processor computing platforms such as ARM, Dragon Ball, ColdFire, Power PC, etc. by reconfiguring and compiling the kernel. Currently, uClinux mainly provides two kernel versions: 2.0 and 2.4.

4.2 Software Development and Debugging Methods

Embedded Linux software development can be carried out in a special mode: host-target mode, where the host is a common PC or workstation, the development environment runs on the host, and the host's operating system is a common Windows or Linux system. The target machine is an embedded application system, which communicates with the host through a serial port, Ethernet or other means, downloads the compiled code from the host and runs it.

Using the free cross-debugging tools provided by GNU, developers can debug programs running on the target machine on the host. An agent is run on the target machine to receive commands and codes sent by the host and interpret and execute them. Through the debugger, developers can set the start and end positions and breakpoints of the program, and can also view and change the values ​​in variables, registers and memory, set program running conditions, etc., making developers feel as convenient as debugging programs on their own machines.

4.3 Flowchart

The main function of the serial bridge control program is to realize the reorganization and forwarding of serial port data and network data. The application on the local host or remote host exchanges information with the device connected to the serial bridge in the original way of operating the local serial port. The device driver on the host converts the serial port data and auxiliary information such as the corresponding serial port number required by the application into a network data packet and sends it to the Ethernet; after receiving the data packet transmitted via Ethernet, the control program of the serial bridge unpacks the data packet and extracts the serial port command data and target serial port number and other information, and then reassembles it into serial port data and sends it to the corresponding serial port. The control program processes the data uploaded by the serial device to the local host or remote host in the opposite way to the above process.

The serial port bridge software structure is shown in Figure 5:

5. Conclusion

This paper discusses the hardware and software design of a serial port bridge device based on the ARM microprocessor S3C4510B and uClinux, briefly describes the functions of the S3C4510B chip, and explores the embedded Linux software development model based on this chip. It has been proven that using Linux as an embedded operating system and making full use of the free development toolkit provided by GNU has lowered the economic threshold for embedded system development, enabling more people to master related technologies, and represents a new direction for embedded system development.

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