Embedded Learning Notes 9——51 MCU Interrupt External Interrupt

   The CPU temporarily interrupts its current work (this is called interrupt response) and switches to processing event B (this is called interrupt service).

2. The interrupt system of 89C51 has 5 interrupt sources (in order of priority: external interrupt 0, timer interrupt 0, external interrupt 1, timer interrupt 1, serial port interrupt), 2 priorities, and can realize secondary interrupt nesting (an interrupt with a higher priority occurs during the interrupt processing process). Advanced microcontrollers may have more interrupt sources and more priorities.

3. The interrupt priority of 89C51 microcontroller has three principles:

  (1) When the CPU receives several interrupts at the same time, it responds to the interrupt request with the highest priority first. (2) The ongoing interrupt process cannot be interrupted by a new interrupt request of the same or lower priority. (3) The ongoing low-priority interrupt service can be interrupted by a high-priority interrupt request. (To implement the latter two principles, the system has two non-addressable priority triggers. One of them is set to 1, indicating that it is responding to a high-priority interrupt and will block all subsequent interrupt requests; the other is set to 1, indicating that it is responding to a low-priority interrupt and will block all subsequent low-priority interrupt requests.)

4. The CPU's development and shielding of all interrupts of the interrupt system and a certain interrupt source are controlled by the interrupt enable register IE.

5. Interrupt response conditions:

   (1) The interrupt source has an interrupt request; (2) The interrupt enable bit of this interrupt source is 1; (3) The CPU turns on the interrupt (i.e. EA = 1).

6. What does a programmer need to do to use interrupts?

    (1) Which interrupt to use (external interrupt, timer interrupt, serial port interrupt, etc.) determines the interrupt number to respond to; (2) What conditions are expected to trigger the interrupt, such as falling edge trigger or low level trigger; (3) What to do after the interrupt (the interrupt service program should be as short as possible).

      For example: a. Set the response value in IE - EA is set to 1 (allow CPU interrupts) and turn on the interrupt to be used; b. Set the trigger mode of the corresponding interrupt in TCON (as shown in the TCON register below); c. Write the interrupt service program (void function name () interrupt interrupt number using any value from 0 to 3 { function body }, where the value from 0 to 3 indicates selecting one of the four groups of registers on the chip to save the scene before the interrupt. It is usually recommended that beginners do not write "using any value from 0 to 3" because you are not clear about the usage of the internal registers. If you do not write it, Keil will automatically specify it for you.)

7. External interrupt:

IT0 (TCON.0) determines whether external interrupt 0 is low level active or falling edge active (from high level to low level). Similarly, IT1 (TCON.2) corresponds to external interrupt 1.