Design of train voice broadcasting system based on ISD4004 and AT89C51 microcontroller

In the modern industrial control process, working status and fault status alarm devices are widely used. They usually use sound and light to remind the operator to deal with the problems in time. With the development of new technologies, people have begun to apply voice technology to this field. It provides relevant information to operators in a more intuitive, easy-to-understand, convenient and accurate form, enabling operators to deal with system problems more accurately and quickly. The ISD series of intelligent voice memory chips produced by the American ISD Company have good sound quality and the voice signal will not be lost during long-term power outages. They are very suitable for the development and application of electronic products. The ISD4004 and AT89C51 microcontrollers were successfully used to design an automatic voice broadcast system for train station signals. By detecting and collecting multiple signals such as the uplink and downlink control of the train station railway lines, vehicle dispatching, and the activation of the system's main and auxiliary power supplies, the system detected and collected the signals according to the safety hazards. According to the prevention requirements, the microcontroller controls the query and broadcast of safety warning voice information to realize safe operation prompts and alarms. The system was installed and used on the console of the signal room of the railway station. It runs stably and the signal broadcast is accurate, achieving good results.

1 Hardware circuit design

The system hardware circuit design principle block diagram is shown in Figure 1, which consists of microcontroller AT89C51, ISD4004 voice circuit, audio power amplifier circuit, programmable parallel interface 8255, photoelectric isolation, level conversion, signal input interface, system clock, reset and keyboard and other units Circuit composition.

1.1 Characteristics of ISD4004

The ISD4004 series of voice memory chips adopts CMOS technology and contains an oscillator, anti-aliasing filter, smoothing filter, audio amplifier, automatic squelch and high-density multi-level flash memory array, and a built-in microcontroller serial communication interface. All operations of the chip must be controlled by the microcontroller, and operating commands can be sent through the serial communication interface (SPI or Microwire). The external audio source signal uses multi-level direct analog storage technology in the chip. The information can be processed in multiple stages. Each sample value is directly stored in the on-chip flash memory, so it can reproduce speech and music very realistically and naturally. , tones and sound effects. Information stored in the on-chip flash memory can be retained for 100 years in the event of a power outage. The working voltage of the chip is 3 V, the working current is 25~30 mA, the holding current is 1μA, and it consumes no power. The recording and playback time of a single chip is 8~16 minutes, and it can record repeatedly 100,000 times.

1.2 Pins and packaging form of ISD4004

ISD4004 is packaged in a 28-pin SOIC, and its pin arrangement is shown in Figure 2.

1.3 Interface between ISD4004 and AT89C51 microcontroller

ISD4004 works on the SPI serial interface. According to the SPI protocol of synchronous serial data transmission, all serial data transmission begins with the falling edge of the chip select signal SS sent by the microcontroller master to ISD4004. SS must be held low during the transfer and high between instructions. Data from the serial data input terminal MOSI pin is latched on the rising edge of the serial synchronization clock, and data on the ISD4004 serial data output terminal MISO pin is shifted out on the falling edge of SCLK. Any recording and playback operation (including fast forward) of ISD4004 is performed according to the segment address. Each segment contains several rows, and each row is equivalent to a storage unit. The information is recorded and played under the control of the row address clock signal RAC. Storage management. The RAC signal period is 200 ms, and the high-level duty cycle is 3/4. When the recording and playback operation reaches the end of the internal storage unit address, an OVF or EOM end flag signal will be generated. If EOM or OVF is encountered, a low-level active INT interrupt signal will be generated. The interrupt status will be changed in the next SPI Cleared at the beginning of the cycle. The connection between ISD4004 and AT89C51 microcontroller is shown in Figure 3.

The chip select signal SS pin of ISD4004 is connected to the I/O port P1.0 of the AT89C51 microcontroller, and a valid low-level signal is generated by program instructions. The serial data input MOSI pin and the serial data output MISO pin are connected to P1.1 and P1.3 respectively. The serial data information sent and received is latched by the on-chip shift register under the control of program instructions, and its synchronization The clock signal SCLK is controlled by the microcontroller P1.2. The row address clock RAC and the interrupt request signal INT are connected to P3.2 (INT1) and P3.3 (INTO) respectively.

1.4 Audio output

The prompt voice corresponding to the system signal, such as "the up train is coming, the section is occupied", "up train is requested, the signal is open" and other information, has been solidified into the storage unit of ISD4004's internal E2PROM by address segments through special equipment. Under program control, the corresponding voice signal is output from pin 13 (AUOUT) of ISD4004, and is sent to the low-noise power amplification integrated circuit for amplification through the coupling capacitor C4 and the volume control potentiometer RW to promote the speaker to sound. In order to minimize the output voice noise, the analog ground and digital ground of the system should be routed separately, connected as close to the power supply end as possible, and led to the VSSA and VSSD pins of the ISD4004 chip respectively. The decoupling capacitor should also be as close to the chip as possible. .

1.5 Expansion of I/O port

The system's 36 signals must be processed by the microcontroller, and at least 36 I/O lines are needed to meet the demand. The remaining I/O ports of AT89C51 are obviously not enough, and the I/O ports must be expanded. The system uses the programmable parallel input and output interface chip 8255 to expand the insufficient I/O port. The specific hardware connection is shown in Figure 4. 8255 is a standard peripheral parallel interface circuit used in the microprocessor expansion system. It is manufactured using NMOS technology and has a 40-pin dual row Direct plug-in DIP package. The 8255 exchanges information with external devices through 24 I/O lines of port A, port B, and port c. Each port is 8 bits. Port C is divided into upper port C (high 4 bits of PC7~PC4) and lower port C (low 4 bits of PC3~PC0). The working mode of the port can be specified as input through programming, which is completed when the main control program is initialized. The 8255 chip select signal is completed by P1.4, and the address buses A0 and A1 are locked through the address latch 74LS373.

1.6 Signal transformation

The system signal is taken from the contacts of the control relay in the station signal room. It is mainly a switching signal of 24 V AC. It must be converted into a TTL level that the microcontroller system can match, that is, 24 V AC is converted into 5 V DC. The signal level conversion circuit is shown in Figure 5. The AC signal is rectified by the diode D32, filtered by the capacitor C32, and input into the photoelectric coupler 4N25 through the current limiting resistor R32. It effectively realizes photoelectric conversion through the internal light-emitting tube and photosensitive receiving tube, and at the same time isolates the electrical network of the external signal from the microcontroller control system. Improve system reliability and anti-interference ability. The output signal after conversion is low level. In order to keep the input signal and output signal levels synchronized, an inverter is added to the rear stage to output a standard TTL 5 V signal and send it to the parallel interface 8255.

2 Overall software design

System software design directly affects the overall performance of the system. The main function of the software is to accurately determine whether the signal is valid through real-time query of railway signals, reliably find the voice storage address corresponding to the signal, and retrieve the information for real-time broadcast. The software program includes the main control program, signal query program, voice broadcast program, data transmission program, and ISD4004 power-on and power-down program. Delay subroutines are used many times in the program. Due to their simple structure and strong versatility, they will not be elaborated in this article.

2.1 Main control program

The main control program flow is shown in Figure 6. When the system is powered on, it must be initialized, complete the clearing of the I/O port, signal unit and signal flag bits and the initialization setting of ISD4004 and 8255, and complete the self-test and Voice broadcast of product information advertisements. Then enter the loop control process of signal query and voice broadcast. In order to prevent the system from false alarms, missed alarms or consecutive alarms, these factors should be fully considered during program design, such as using signal delay anti-shake judgment, signal level high and low staggered flag judgment and signal unit address table lookup, etc. to improve system reliability.

2.2 Signal query subroutine

The flow of the signal query subroutine is shown in Figure 7. The system's 30 multi-channel signals respectively occupy part of the I/O lines of the AT89C51 microcontroller and the 24 input lines of the A, B, and C ports of the programmable interface 8255. The program queries multiple signals one by one and stores the incoming valid signals in unit-by-unit tags so that the parameters can be passed to the main control program.