Issues that need to be paid attention to in single chip microcomputer EMC

1.1 The design of the microcontroller should choose a lower operating frequency according to customer needs

First, let me introduce the advantages of doing this: using a low crystal oscillator and bus frequency allows us to choose a smaller microcontroller to meet the timing requirements, so that the operating current of the microcontroller can become lower, and most importantly, the current peak from VDD to VSS will be smaller.

Of course, we need to make a compromise here, because the customer's requirements may be compatible and platform-based (the current development trend of automotive electronics is platform-based). Choosing a higher operating frequency can be compatible with more platforms and facilitate future upgrades and expansions. Therefore, we need to choose a lower acceptable operating frequency.

2 Appropriate output drive capability

Given load specifications, rise and fall times, selecting the appropriate output rise time, and minimizing output and internal driver peak currents are among the most important design considerations for reducing EMI. Mismatched drive capabilities or failure to control the output voltage change rate may result in impedance mismatch, faster switching edges, overshoot and undershoot of the output signal, or power and ground bounce noise.

2.1 To design the output driver of the microcontroller, first determine the load required by the module, the rise and fall time, and the output current. Based on the above information, the driving capability and the voltage slew rate are controlled. Only in this way can the module requirements and EMC requirements be met.

When the driver capability is higher than the actual charging speed required by the load, a higher edge rate will be generated, which has two disadvantages:

1. The harmonic components of the signal increase.

2. Together with load capacitance and parasitic internal bonding lines, IC packaging, and PCB inductance, it will cause signal overshoot and undershoot.

Selecting the appropriate di/dt switching characteristics can be achieved by carefully selecting the size of the drive capability and controlling the voltage slew rate. The best option is to use a constant voltage slew rate output buffer that is independent of the load. The voltage slew rate of the same pre-driver output can be reduced (i.e., the rise and fall times can be increased), but the corresponding propagation delay will increase and we need to control the total switching time).

2.2 Use the driving capability of the programmable output port of the microcontroller to meet the actual load requirements of the module.

The simplest driver for a programmable output port is a pair of drivers connected in parallel. Their MOS Rdson is different and their output current capabilities are also different. We can choose different modes during testing and actual use. In fact, current microcontrollers generally have at least two modes to choose from, and some even have three (strong, medium, weak)

2.3 When the timing constraints have enough margin, slow down the edge of the internal clock drive by reducing the output capability.

An important consideration for reducing the peak current and di/dt of synchronous switching is to reduce the internal clock drive capability (actually the amplification factor, the through current is highly correlated with it). Reducing the current at the clock edge will significantly improve EMI. Of course, the disadvantage of doing so is that the average current of the microcontroller may increase due to the longer turn-on time of the clock and load. A compromise needs to be made between fast edges and relatively high peak currents and longer current pulses with slower edges.

2.4 The internal drive (inverter) of the crystal oscillator should not exceed the actual demand.

This problem has actually been discussed before. When the gain is too large, it will cause greater interference.

3 Designing a driver with minimum shoot-through current

3.1 Clock, bus and output drivers should minimize conventional current consumption

The through current [overlap current, short-circuit current] is the current from the power supply to the ground when the PMOS and NMOS are turned on at the same time during the switching process of the microcontroller. The through current directly affects EMI and power consumption.

This content is actually inside the microcontroller, the clock, bus and output driver. The way to eliminate or reduce the through current is to try to turn off a FET first and then turn on a FET. When the current is large, additional pre-drive circuits or voltage slew rates are required.