The relationship between EXTI (external interrupt) and NVIC (nested vector interrupt) in STM32

The vector interrupts of Cortex-M3 are uniformly managed by NVIC.
EXTI is the external interrupt control extended by ST on its STM32 products. It is responsible for managing the external interrupts mapped to the GPIO pins and the interrupts of several integrated peripherals on the chip (PVD, RTC alarm, USB wakeup, ethernet wakeup), as well as software interrupts. Its output is eventually mapped to the corresponding channel of NVIC. Therefore, the process of configuring EXTI interrupts must include the configuration of NVIC. For example, the process of configuring EXTI0 below first configures the EXTI controller (enables the corresponding interrupt line, selects the interrupt/event mode, and triggers the edge polarity), and then configures the NVIC controller (the channel number of EXTI0 mapped on NVIC, interrupt priority, and interrupt masking status):

GPIO_EXTILineConfig(GPIO_PortSourceGPIOB, GPIO_PinSource0);

EXTI_InitStructure.EXTI_Line = EXTI_Line0;
EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling;  // or Rising
EXTI_InitStructure.EXTI_LineCmd = ENABLE;
EXTI_Init(&EXTI_InitStructure);

NVIC_InitStructure.NVIC_IRQChannel = EXTI0_IRQn; // EXTI0_IRQn is defined in stm32f10x.h
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);

The value of EXTI0_IRQn is actually the position of the EXTI0 interrupt vector in the interrupt vector table (the value in the Position column of the interrupt vector table in the STM32 Technical Reference Manual)