STM32 Development Board Learning Diary-[3] TIM timer output comparison

In some applications of STM32, users have the requirement to execute certain programs periodically. The timer can be used to generate a fixed time period to meet such requirements.

STM32 related features:
STM32 advanced timers TIM1, TIM8, general timers TIM2, TIM3, TIM4, TIM5;
the maximum clock of the timer is 72MHz, and with pre-scaling, it provides flexible clock cycles;
each TIM has 4 independent capture/compare channels, DMA/interrupt functions;
the channel works in output comparison timing mode, and one TIM can provide up to 4 different timing cycles.

Principle:
A certain output/capture channel of TIM works in output comparison timing mode.
When the counter counts to the comparison value, an interrupt is generated, and the capture comparison register is refreshed in the interrupt, so that the next interrupt can be generated after the same time interval.

The TIM2 clock is set to 36MHz, the prescaler is set to 2, and the Output Compare Toggle Mode is used.

The TIM2 counter clock can be expressed as: TIM2 counter clock = TIMxCLK / (Prescaler +1) = 12 MHz

Set the TIM2_CCR1 register value to 32768, then the CC1 update frequency is the TIM2 counter clock frequency divided by the CCR1 register value, which is 366.2 Hz. Therefore, TIM2 channel 1 can generate a periodic signal with a frequency of 183.1 Hz.

Similarly, according to the values ​​of registers TIM2_CCR2, TIM2_CCR3 and TIM2_CCR4, TIM2 channel 2 can generate a periodic signal with a frequency of 366.3 Hz; TIM2 channel 3 can generate a periodic signal with a frequency of 732.4 Hz; and TIM2 channel 4 can generate a periodic signal with a frequency of 1464.8 Hz.

Each output can be observed through an oscilloscope.

#include "stm32f10x_lib.h"

TIM_TimeBaseInitTypeDef   TIM_TimeBaseStructure;
TIM_OCInitTypeDef   TIM_OCInitStructure;
vu16 CCR1_Val = 32768;
vu16 CCR2_Val = 16384;
vu16 CCR3_Val = 8192;
vu16 CCR4_Val = 4096;
ErrorStatus HSEStartUpStatus;

void RCC_Configuration(void);
void GPIO_Configuration(void);
void NVIC_Configuration(void);
   

int main(void)
{
#ifdef DEBUG
  debug();
#endif

 
  RCC_Configuration();

 
  NVIC_Configuration();
 
 
  GPIO_Configuration();

 
  TIM_TimeBaseStructure.TIM_Period = 65535;   //这里必须是65535
     
  TIM_TimeBaseStructure.TIM_Prescaler = 2;      
  TIM_TimeBaseStructure.TIM_ClockDivision = 0;   
  TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
 
  TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure);

 
  TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_Toggle;   //Pin output mode: Toggle (TIM output comparison trigger mode)
   
  TIM_OCInitStructure.TIM_Channel = TIM_Channel_1;          
  TIM_OCInitStructure.TIM_Pulse = CCR1_Val;    //Toggle cycle

  TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_Low; //TIM output comparison polarity low

  TIM_OCInit(TIM2, &TIM_OCInitStructure);

  TIM_OC1PreloadConfig(TIM2, TIM_OCPreload_Disable); //Disable TIMx preload register on CCR1

 
  TIM_OCInitStructure.TIM_Channel = TIM_Channel_2;         
  TIM_OCInitStructure.TIM_Pulse = CCR2_Val; 
 
  TIM_OCInit(TIM2, &TIM_OCInitStructure);

  TIM_OC2PreloadConfig(TIM2, TIM_OCPreload_Disable);

 
  TIM_OCInitStructure.TIM_Channel = TIM_Channel_3;         
  TIM_OCInitStructure.TIM_Pulse = CCR3_Val; 
 
  TIM_OCInit(TIM2, &TIM_OCInitStructure);

  TIM_OC3PreloadConfig(TIM2, TIM_OCPreload_Disable);

 
  TIM_OCInitStructure.TIM_Channel = TIM_Channel_4;         
  TIM_OCInitStructure.TIM_Pulse = CCR4_Val; 
 
  TIM_OCInit(TIM2, &TIM_OCInitStructure);

  TIM_OC4PreloadConfig(TIM2, TIM_OCPreload_Disable);
 
 
  TIM_Cmd(TIM2, ENABLE);

 
  TIM_ITConfig(TIM2, TIM_IT_CC1 | TIM_IT_CC2 | TIM_IT_CC3 | TIM_IT_CC4, ENABLE);

  while (1)
  {
  } 
}

[page]
void RCC_Configuration(void)
{  
 
  RCC_DeInit();

 
  RCC_HSEConfig(RCC_HSE_ON);

 
  HSEStartUpStatus = RCC_WaitForHSEStartUp();

  if(HSEStartUpStatus == SUCCESS)
  {
   
    FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);

   
    FLASH_SetLatency(FLASH_Latency_2);
 
   
    RCC_HCLKConfig(RCC_SYSCLK_Div1);
 
   
    RCC_PCLK2Config(RCC_HCLK_Div1);

   
    RCC_PCLK1Config(RCC_HCLK_Div4);

   
    RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);

   
    RCC_PLLCmd(ENABLE);

   
    while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
    {
    }

   
    RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);

   
    while(RCC_GetSYSCLKSource() != 0x08)
    {
    }
  }

 
  RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);

 
  RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
}

void GPIO_Configuration(void)
{
  GPIO_InitTypeDef GPIO_InitStructure;

 
  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3;
  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;

  GPIO_Init(GPIOA, &GPIO_InitStructure);
}

void NVIC_Configuration(void)
{
  NVIC_InitTypeDef NVIC_InitStructure;
  
#ifdef  VECT_TAB_RAM 
 
  NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
#else 
 
  NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);  
#endif
 
 
  NVIC_InitStructure.NVIC_IRQChannel = TIM2_IRQChannel;
  NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
  NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; 
  NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
  NVIC_Init(&NVIC_InitStructure);
}

#ifdef  DEBUG

void assert_failed(u8* file, u32 line)
{
 

  while (1)
  {
  } 
}
#endif
 

Interrupt service:

void TIM2_IRQHandler(void)
{
 
  if (TIM_GetITStatus(TIM2, TIM_IT_CC1) != RESET) //Check whether the specified TIM interrupt occurs or not
  {
    TIM_ClearITPendingBit(TIM2, TIM_IT_CC1 ); //Clear TIMx interrupt pending bit
 capture = TIM_GetCapture1(TIM2);
 TIM_SetCompare1(TIM2, capture + CCR1_Val ); //Set TIMx auto-reload register value
        //Increase the value of TIM2_CC1 by CCR1_Val, so that the next TIM event also requires CCR1_Val pulses,

  }
 
 
  if (TIM_GetITStatus(TIM2, TIM_IT_CC2) != RESET)
  {
     TIM_ClearITPendingBit(TIM2, TIM_IT_CC2);
 capture = TIM_GetCapture2(TIM2);
    TIM_SetCompare2(TIM2, capture + CCR2_Val);
  } 

 
  if (TIM_GetITStatus(TIM2, TIM_IT_CC3) != RESET)
  {
    TIM_ClearITPendingBit(TIM2, TIM_IT_CC3);
 capture = TIM_GetCapture3(TIM2);
    TIM_SetCompare3(TIM2, capture + CCR3_Val);
  }

 
  if (TIM_GetITStatus(TIM2, TIM_IT_CC4) != RESET)
  {
    TIM_ClearITPendingBit(TIM2, TIM_IT_CC4);
 capture = TIM_GetCapture4(TIM2);
    TIM_SetCompare4(TIM2, capture + CCR4_Val);
  }  
}