1 System Design
The design uses a 16-bit PIC24FJ64GA as the main chip, which has a 10-bit A/D, UART, SPI interface and CAN interface, which can fully meet the design requirements and has the characteristics of low cost and high reliability. In Figure 1, the three-phase electrical parameters of the mains and the generator are transmitted to the A/D port of the main chip through the signal conditioning circuit 1, and the parameters such as the oil temperature and oil pressure of the generator are transmitted to the A/D port of the main chip through the signal conditioning circuit 2. When used as a backup power supply, it works in automatic mode, monitors the mains parameters and performs a trip operation when the mains voltage is abnormal. At this time, the diesel generator is automatically started. After waiting for the start-up to be completed, the closing operation is performed to provide power. When the mains power is restored, the switch is closed to the mains power grid, and the diesel generator is stopped at the same time to achieve automatic closing and opening (ATS switching). When used as a power supply, it works in manual mode and manually controls the generator start. After the generator is started, the various parameters of the generator operation will be detected in real time and transmitted to the 128×64 LCD screen through SPI. In addition, the controller is also equipped with CAN and 485 interfaces. By connecting to a PC, the parameters of the controller can be set through the host computer, and the data collected by the controller can also be displayed on the host computer. The CSM module can send alarm information to the user's mobile phone via SMS.
2 Circuit Design
2.1 Three-phase voltage detection signal conditioning circuit
The purpose of this circuit is to convert the three-phase voltage into a voltage range that can be input by the processor A/D. The signal conditioning circuit uses the differential circuit in the op amp circuit to achieve this. Figure 2 shows the line voltage conversion of L1-N. Since the A/D voltage range of PIC24FJ64CA is 0-3.3 V, and the negative voltage of AC cannot be sampled by A/D, previous designs often use dedicated A/D chips to convert negative voltages, which increases the cost. This article adds a 1.6 V bias signal to the in-phase input to shift the amplitude of the sine wave upward, so that the forward voltage is between 1.6 and 3.3 V, and the reverse voltage is between 0 and 1.6 V, with 0 being 1.6 V. A complete sine wave can be collected at 0-3.3 V. The advantage of this method is that the pre-circuit processing is simple, the cost is greatly reduced, and it makes it convenient for the CPU to process AC voltage. The designed measurement voltage range is 0~450 V, and the proportional coefficient is K=RF/R4=0.002, so that the output voltage range is between 0.7~2.5 V. It was found during field use that there are large interference signals in the AC power.
(1) When the gate is closed, there is a large disturbance voltage on the neutral line. This is because other electrical equipment in the power grid will generate voltage in the AC circuit.
(2) The output voltage waveform is superimposed with high-frequency interference signals. Therefore, this circuit adds C1 at the bias end, that is, the in-phase input end, to filter out the interference signal on the neutral line, and adds C2 at the output end to filter out the high-frequency signal.
Similarly, the line voltages of the other two phase voltages L2-N and L3-N are measured, and then the phase voltages of L1-L2, L2-L3, and L3-L1 can be obtained through calculation.
The 3 dB bandwidth fc=1.32 kHz, which can pass 50 Hz AC and suppress signals with frequencies higher than 1.32 kHz. The signal effect of this circuit design is shown in Figure 3.
2.2 Three-phase voltage frequency signal conditioning circuit
The purpose of this circuit is to convert the sine wave signal of AC into a square wave signal that can be recognized by the counter port of the single-chip microcomputer, and to suppress high-frequency interference to make the measurement result accurate. The basic design idea is to achieve it through a limited gain feedback type second-order low-pass filter and a double-limit comparator. The specific implementation circuit is shown in Figure 4.
The first operational amplifier link is a limited gain feedback second-order low-pass filter, and its input and output transfer functions are as follows [page]
Through analysis and calculation, it can be seen that the bandwidth is 212.31 Hz, the amplitude-frequency characteristic has no resonance and no overshoot, and meets the design performance indicators.
2.3 Communication interface circuit
2.3.1 RS-485 communication interface
Since the serial communication bus of the PC is RS-232 level, in order to make the RS-485 bus communicate with the PC, it is necessary to convert RS-485 into RS-232, and use the Modbus protocol to communicate with the host computer. The RS-485 interface uses the RSM3485 chip to receive the parameters monitored by the controller through the port, and can also set some control parameters through the port. The RS-485 uses a differential level format, which can suppress common mode interference, so its communication distance is much longer than RS-232. For users with monitoring requirements, the monitoring room can be set far away from the computer room.
2.3.2 CAN communication interface
CTM1050T is a 5V high-speed isolated CAN transceiver. In the design, shielded wire communication is used to suppress electromagnetic interference. The shielding layer is connected to the CANSCR pin, where R9 and C12 are high-voltage resistors and capacitors. The circuit design feature is that it can suppress electromagnetic interference and prevent the circuit from burning due to bus overvoltage.
3 Software Design
3.1 Voltage parameter detection software design
The voltage signal of the mains/generator is converted into a low-voltage signal between 0 and 3.3 V through the signal conditioning circuit and input into the A/D port of the PIC24FJ64GA. According to the sine wave frequency of 50 Hz, the sampling conversion cycle is set to 2 kHz. The design converts data 8 times per conversion cycle, samples 40 data in one sine wave cycle, filters the sampled data, and converts them to obtain the final result.
The A/D value collected for the kth time, buf0~buf7 is the buffer area for storing A/D readings. In order to suppress transient interference, the data in buff is sorted, and the median value is used to take the average after sorting.
D(k)=(buf3+buf4)/2 (13)
Based on the A/D reference voltage of 3.3 V, 10-bit A/D, each A/D reading represents 3.225 mV, and the above signal conditioning circuit has an amplification factor of 0.002, which means that 2 mV represents 1 V. Calculate the voltage value represented by each A/D reading
A=3.225/2=1.57 (14)
According to the signal conditioning circuit, add a 1.6 V bias, the 0 bit is 1.6 V, the A/D reading is 512, and the reading is converted to a voltage value
u(k)=[D(k)-512]/1 023×A (15)
Take the root mean square of the values collected during a sine wave cycle and get the effective value of a sine wave cycle at time T
In the experiment, it was found that if only one sine wave was collected to calculate the effective value and display it directly, the displayed effective value would be unstable and would jump periodically. Therefore, a first-order lag filtering algorithm was adopted.
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