STM32 study notes--GPIO settings

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The IO port of STM32 can be configured into 8 modes by software:

1. Input floating
2. Input pull-up
3. Input pull-down
4. Analog input
5. Open drain output
6. Push-pull output
7. Push-pull multiplexing function
8. Open drain multiplexing function

Each IO port of STM32 is controlled by 7 registers. They are: 2 32-bit port configuration registers CRL and CRH in configuration mode; 2 32-bit data registers IDR and ODR; 1 32-bit set/reset register BSRR; 1 16-bit reset register BRR; 1 32-bit latch register LCKR; Here we only introduce several commonly used registers, and we only use 4 IO port registers: CRL, CRH, IDR, ODR.

The IO port configuration table of STM32 is shown in Table 3.1.1.1:

STM32 study notes--GPIO settings
The STM32 output mode configuration is shown in Table 3.1.1.2:

STM32 study notes--GPIO settings
The reset value of this register is 0X4444 4444. As can be seen from the figure above, the reset value is actually to configure the port to floating input mode. From the figure above, it can also be concluded that the CRL of STM32 controls the mode of the lower 8 bits of each IO port (A~G). The bits of each IO port occupy 4 bits of CRL, the upper two bits are CNF, and the lower two bits are MODE. Here we can remember several commonly used configurations, such as 0X0 for analog input mode (for ADC), 0X3 for push-pull output mode (for output port, 50M rate), 0X8 for pull-up/pull-down input mode (for input port), and 0XB for multiplexed output (using the second function of the IO port, 50M rate).

Let's take an example. For example, we want to set the 11th bit of PORTC as pull-up input and the 12th bit as push-pull output. The code is as follows:
GPIOC->CRH&=0XFFF00FFF; //Clear the original settings of these two bits, and do not affect the settings of other bits
GPIOC->CRH|=0X00038000; //PC11 input, PC12 output
GPIOC->ODR=1<<11; //PC11 pull-up
IDR is a port input data register, which only uses the lower 16 bits. This register is a read-only register and can only be read out in 16-bit form. The description of each bit of this register is shown in the figure below:

STM32 study notes--GPIO settings

To know the status of a certain IO port, you just need to read this register and look at the status of a certain bit. It is relatively simple to use.

ODR is a port output data register, and only the lower 16 bits are used. This register is readable and writable. The data read from this register can be used to determine the output status of the current IO port. Writing data to this register can control the output level of a certain IO port. The description of each bit of this register is shown in the figure below:

STM32 study notes--GPIO settings

Here, we can summarize. For those who have learned AVR, we all know that the IO port of AVR is controlled by 3 registers: DDR, PORT, and PIN. Here we can make an analogy between the IO control registers of STM32 and AVR:
1.
The CRL and CRH of STM32 are equivalent to the DDR registers of AVR, which are used to control the direction of the IO port, but the CRL and CRH of STM32 are more powerful.
2.
The ODR of STM32 is equivalent to the PORT of AVR, which is used to control the output level of the IO port or the pull-up and pull-down resistors.
3.
The IDR of STM32 is equivalent to the PIN of AVR, which is used to store the current input status (high and low levels) of the IO port.
In addition, STM32 also has several registers such as BSRR, BRR, LCKR, etc. for controlling the IO port, which is not available in AVR.

Keywords:STM32 Reference address:STM32 study notes--GPIO settings

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