STM32 interrupt process processing-EEWORLD

Collect

As a habit of mine, when learning something about a certain platform, I always have to understand the interrupt processing flow first, of course, by analyzing the flow at the file code level.

Next, let's talk about the interrupt process of stm32. As we know, there are many drivers written in the stm32 library, which can be said to include all. At the same time, it also provides many data processing methods, such as serial port reading and writing, users can choose polling, interrupt, DMA and other 3 methods to process.

Regarding interrupts, the stm32 library has a good framework. Users only need to fill in the implementation of several functions. As it is said on the Internet, this is fool-proof development.

To understand interrupts, you must first know the file stm32f10x_it.c, which is usually in the same directory as the main file. Open this file and we can see the implementation of the xyz_IRQHandler function. Although it is an implementation, it is almost empty. By the way, these functions are interrupt handling functions that users need to fill in. If you use an interrupt to do the corresponding processing, you have to fill in the corresponding interrupt handling function. You need to fill it in according to the actual situation of each peripheral, but generally there will be interrupts turned off and on. There are also many system-related interrupt handling functions in this file, such as the system clock SysTickHandler. For specific implementations, please refer to the examples under stm32fwlibFWLibexamples.

So far, we have only seen the interrupt processing functions, but how are these processing functions called by hardware interrupts? Well, speaking of this, we have to mention the file stm32f10x_vector.c. The content is as follows:

typedef void( *intfunc )( void );
typedef union { intfunc __fun; void * __ptr; } intvec_elem;

//IAR has made some extensions to the language used (here is C), that is, extended functions can be used here
#pragma language=extended #pragma segment="CSTACK"

void __iar_program_start( void );

#pragma location = ".intvec"

const intvec_elem __vector_table[] =
{
  { .__ptr = __sfe( "CSTACK" ) },
  &__iar_program_start,
  NMIException,
  HardFaultException,
  MemManageException,
  BusFaultException,
  UsageFaultException,
  0, 0, 0, 0,
  vPortSVCHandler,
  DebugMonitor,
  0,
  xPortPendSVHandler,
  xPortSysTickHan dler,
  WWDG_IRQHandler ,
  PVD_IRQHandler,
  TAMPER_IRQHandler,
  RTC_IRQHandler,
  FLASH_IRQHandler,
  RCC_IRQHandler,
  EXTI0_IRQHandler,
  EXTI1_IRQHandler,
  EXTI2_IRQHandler,
  EXTI3_IRQHandler,
  EXTI4_IRQHandler,
  DMAChannel1_IRQHandler,
  DMAChannel2_IRQHandler,
  DMAChannel3_IRQHandler,
  DMAChannel4_IRQHandler,
  DMAChannel5_IRQHandler, DMAChannel6_IRQHandler,
  DMAChannel7_IRQHandler
  ,
  ADC_IRQHandler,
  USB_HP_CAN_TX_IRQHandler,
  USB_LP_CAN_RX0_IRQHandler,
  CAN_RX1_IRQHandler,
  CAN_SCE_IRQHandler,
  EXTI9_5_IRQHandler,
  TIM1_BRK_IRQHandler,
  TIM1_UP_IRQHandler
  , TIM1_TRG_COM_IRQHandler,
  TIM1_CC_IRQHandler,
  vTimer2IntHandler,
  TIM3_IRQHandler,
  TIM4_IRQHandler,
  I2C1_EV_IRQHandler,
  I2C1_ER_IRQHandler,
  I2C2_EV_IRQHandler,
  I2C2_ER_IRQHandler,
  SPI1_IRQHandler,
  SPI2_IRQHandler,
  vUARTInterruptHandler,
  USART2_IRQHandler,
  USART3_IRQHandler,
  EXTI15_10_IRQHandler,
  RTCAlarm_IRQHandler,
  USBWakeUp_IRQHandler,
};

Now we know that this is the interrupt vector table. Each item corresponds to an interrupt or exception handler. The items here should be filled in the same order as in the list in the Interrupt and exception vectors section of stm32spec.

At this point, there is another question, where is this vector table placed? From the above explanation of .intvec, we can see that it is placed at an address by the linker (here is 0x08000000, NVIC_VectTab_FLASH). But how does stm32 know this address? Maybe there is a default value, or is it just a fixed value? ). We found the following function in the stm32f10x_nvic.c file

void NVIC_SetVectorTable(u32 NVIC_VectTab, u32 Offset)
{

  assert(IS_NVIC_VECTTAB(NVIC_VectTab));
  assert(IS_NVIC_OFFSET(Offset));

  SCB->ExceptionTableOffset = (((u32)Offset << 0x07) & (u32)0x1FFFFF80);

SCB->ExceptionTableOffset |= NVIC_VectTab;
}

There is also an example of vectortable_relocation in the example directory: This example describes how to use the NVIC firmware library to set the CortexM3 vector table in a specific address other than default.

In this example, the above function is called directly, which seems to be obvious. But how does SCB->ExceptionTableOffset work?

To explain this problem in detail, let's first look at a set of definitions: [stm32f10x_map.b]

#define SCS_BASE ((u32)0xE000E000)

#define SysTick_BASE          (SCS_BASE + 0x0010)
#define NVIC_BASE             (SCS_BASE + 0x0100)
#define SCB_BASE              (SCS_BASE + 0x0D00)

#ifdef _SCB
#define SCB ((SCB_TypeDef *) SCB_BASE)
#endif

typedef struct
{
  vu32 CPUID;
  vu32 IRQControlState;
  vu32 ExceptionTableOffset;
  vu32 AIRC;
  vu32 SysCtrl;
  vu32 ConfigCtrl;
  vu32 SystemPriority[3];
  vu32 SysHandlerCtrl;
  vu32 ConfigFaultStatus;
  vu32 HardFaultStatus;
  vu32 DebugFaultStatus;
  vu32 MemoryManageFaultAddr;
  vu32 BusFaultAddr;
} SCB_TypeDef;

In fact, the main thing here is to figure out what this SCB means, because this structure is mapped to a physical address. Like other control registers, it is played in this way. Could it be that this is also a kind of controller? After searching on Google, it turns out that the system control register group [mentioned in the previous article] has the following definition in the STM32 firmware library:

typedef struct
{
  vuc32 CPUID;
  vu32 ICSR;
  vu32 VTOR;
  vu32 AIRCR;
  vu32 SCR;
  vu32 CCR;
  vu32 SHPR[3];
  vu32 SHCSR;
  vu32 CFSR;
  vu32 HFSR;
  vu32 DFSR;
  vu32 MMFAR;
  vu32 BFAR;
  vu32 AFSR;
} SCB_TypeDef ;

Their corresponding names in the ARM manual are
CPUID = CPUID Base Register
ICSR = Interrupt Control State Register
VTOR = Vector Table Offset Register
AIRCR = Application Interrupt/Reset Control Register
SCR = System Control Register
CCR = Configuration Control Register
SHPR = System Handlers Priority Register
SHCSR = System Handler Control and State Register
CFSR = Configurable Fault Status Registers
HFSR = Hard Fault Status Register
DFSR = Debug Fault Status Register
MMFAR = Mem Manage Address Register
BFAR = Bus Fault Address Register
AFSR = Auxiliary Fault Status Register

At this point, we finally know that the address of this interrupt vector table will eventually be written to a controller. So, the above 0x08000000 can be a different value, as long as it is ensured that this address cannot be accessed by other programs.

Keywords：STM32 Reference address：STM32 interrupt process processing

Previous article：Learning experience of STM32 external interrupt/event controller (EXTI)
Next article：STM32 clock system analysis (program)

Recommended ReadingLatest update time:2024-11-16 13:46

stm32-GPIO operation (library function)

It's rare to have time, so I want to write about the basics of stm32 recently. 8 ways of GPIO 1. Floating input GPIO_IN_FLOATING ——Floating input, can be used for KEY recognition, RX1 2. GPIO_IPU with pull-up input——IO internal pull-up resistor input 3. GPIO_IPD with pull-down input——IO internal pul

[Microcontroller]

Problems encountered in reading and writing 24C02 with STM32

I have been working on I2C these days, reading the data from 24C02. I typed the code silently and then simulated it. The code is just the following two lines, which write a byte and then read it. I2C_EE_BufferWrite( &write,100, 1); I2C_EE_BufferRead(&read,100, 1); Then all kinds of things went wrong, and afte

[Microcontroller]

Problems encountered in reading and writing 24C02 with STM32

STM32 multiplexing and remapping (USART Remap)

Hello everyone, starting from today, I will share and discuss the problems I encountered in my work and my learning experience with you. Let me tell you about the port remapping of the STM32 microcontroller, because I use myself as an example. Here is the remapping of USART1 as an example. Because I want a TF

[Microcontroller]

STM32 multiplexing and remapping (USART Remap)

【STM32】FSMC Application

【Time calculation】 From the formula: DATAST × HCLK = tWRLW, DATAST = 15/13.8 ns = 1.08, take 1. Then, from the formula ((ADDSET + 1) + (DATAST + 1)) × HCLK = max(tCYC, tCYC(READ)), that is, ((ADDSET + 1) + (DATAST + 1)) × HCLK = 66, we can calculate ADDSET = 66/13.8 - 3 = 1.7, which is 2. Finally

[Microcontroller]

stm32 rtc error experiment

1. stm32f103re, using external crystal oscillator 32.768k, without calibrating the rtc clock, using the serial port to print time, and using a serial port tool with timestamp to record the time received by the serial port. 2. The test lasts one day. Data are as follows: Start timing: Computer time stm32 time 00

[Microcontroller]

STM32 JTAG failure recovery

Yesterday I was debugging an STM32L151 board using JlinkOB. During debugging, the following error occurred: JLink Error: could not start CPU core. JLink Warning: CPU could not be halted . The reason for this error is that there are statements in the program to modify the JTAG port (PA13, PA14). When JTAG is used

[Microcontroller]

STM32 controls the output count of 4-bit common anode digital tube

A total of 12 pins of GPIO port PA0~PA11 are used First, the schematic diagram Because it is a common anode, 12, 9, 8, and 6 are power inputs, and the other pins are grounded. So for the chip, 12, 9, 8, and 6 are high outputs, and the others can be set to low. //Set the GPIO port void GPIO_Num_Init(void) {

[Microcontroller]

STM32 controls the output count of 4-bit common anode digital tube

Several reasons why STM32 cannot run after compilation

1. The compilation and linking can pass, but uVision MDK cannot run at full speed and stops as soon as it runs. The reason is that the Option->Target->Code Generation->Use MicroLIB checkbox is not checked. Generally speaking, for the situation where it stops as soon as it runs, check Use MicroLIB, recompile, and the ru

[Microcontroller]

Several reasons why STM32 cannot run after compilation

Popular Resources
Popular amplifiers