STM32 currently supports a total of 84 interrupts (16 cores + 68 external), 16 levels
of programmable interrupt priority settings (only the upper 4 bits of the 8-bit interrupt priority setting) and 16 preemption priorities (because the preemption priority can be up to four digits).
First of all, the priority grouping is mainly to set the number of preemption priorities and response priorities.
Preemptive priority 0-15 is set according to the grouping (0 group 0) (1 group 0-1) (2 groups 0-3) (3 groups 0-7) (4 groups 0-15)
Response priority 0-15 is set according to the grouping (0 group 0-15) (1 group 0-7) (2 groups 0-3) (3 groups 0-1) (4 groups 0)
If it is preemption priority, it means the interrupt is not powerful. The response priority is for when two interrupts arrive at the same time, the higher one will be responded to first.
If the two interrupt response priorities are the same, the one with the higher interrupt number will be responded to first
.
2. Priority Judgment
There are two concepts of priority in STM32 (Cortex-M3) - preemptive priority and response priority. Some people call response priority "sub-priority" or "sub-priority". Each interrupt source needs to be assigned these two priorities.
An interrupt with a high preemptive priority can be responded to during the interrupt processing with a low preemptive priority, that is, interrupt nesting, or an interrupt with a high preemptive priority can nest an interrupt with a low preemptive priority.
When the preemptive priority of two interrupt sources is the same, there will be no nesting relationship between the two interrupts. When an interrupt arrives, if another interrupt is being processed, the later interrupt will have to wait until the previous interrupt is processed before it can be processed. If the two interrupts arrive at the same time, the interrupt controller decides which one to process first based on their response priority; if their preemptive priority and response priority are equal, it decides which one to process first based on their ranking order in the interrupt table.
3: Priority Grouping
Since each interrupt source needs to be assigned these two priorities, there needs to be a corresponding register bit to record the priority of each interrupt; in Cortex-M3, 8 bits are defined for setting the priority of the interrupt source. These 8 bits can be allocated in 8 ways in the interrupt priority grouping field of the NVIC Application Interrupt and Reset Control Register (AIRCR), as follows:
All 8 bits are used to specify the response priority
The highest 1 bit is used to specify the preemptive priority, and the lowest 7 bits are used to specify the response priority
The highest 2 bits are used to specify the preemptive priority, and the lowest 6 bits are used to specify the response priority
The highest 3 bits are used to specify the preemptive priority, and the lowest 5 bits are used to specify the response priority
The highest 4 bits are used to specify the preemptive priority, and the lowest 4 bits are used to specify the response priority
The highest 5 bits are used to specify the preemptive priority, and the lowest 3 bits are used to specify the response priority
The highest 6 bits are used to specify the preemptive priority, and the lowest 2 bits are used to specify the response priority
The highest 7 bits are used to specify the preemptive priority, and the lowest 1 bit is used to specify the response priority
This is the concept of priority grouping.
Cortex-M3 allows fewer interrupt sources to use fewer register bits to specify the priority of the interrupt source, so the STM32 reduces the register bits for specifying interrupt priority to 4 bits (the upper four bits of AIRCR). The grouping of these 4 register bits is as follows:
Group 0: All 4 bits are used to specify the response priority
Group 1: The highest 1 bit is used to specify the preemptive priority, and the lowest 3 bits are used to specify the response priority
Group 2: The highest 2 bits are used to specify the preemptive priority, and the lowest 2 bits are used to specify the response priority
Group 3: The highest 3 bits are used to specify the preemptive priority, and the lowest 1 bit is used to specify the response priority
Group 4: All 4 bits are used to specify the preemptive priority
You can choose which priority grouping method to use by calling the function NVIC_PriorityGroupConfig() in the STM32 firmware library. This function has the following five parameters:
NVIC_PriorityGroup_0 => Select Group 0
NVIC_PriorityGroup_1 => Select Group 1
NVIC_PriorityGroup_2 => Select Group 2
NVIC_PriorityGroup_3 => Select Group 3
NVIC_PriorityGroup_4 => Select Group 4
The interrupt priority grouping is to allocate the number of bits occupied by each priority number in the upper four bits of the interrupt priority register to the preemptive priority and response priority. It can only be set once in a program.
4: Interrupt source priority
The next step is to specify the priority of the interrupt source. The interrupt source priority is set in the interrupt priority register . Only the upper four bits can be set. The corresponding value must be set in the register according to the number of bits set in the interrupt priority group. If you choose the third group of the interrupt priority group: the highest 3 bits are used to specify the preemptive priority, and the lowest 1 bit is used to specify the response priority, then the preemptive priority has eight data options from 000-111, that is, there are eight interrupt nests, and the response priority has two types of 0 and 1, a total of 8*2=16 priorities.
The interrupt source priority specifically sets the priority level of the interrupt source.
Multiple (up to 16) priorities can be set in one program, but only one can be set for each interrupt source.
Every interrupt priority program must include the following two functions:
(1) void NVIC_PriorityGroupConfig(u32 NVIC_PriorityGroup) interrupt group setting
(2) void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct) interrupt priority setting
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