Design of a signal generator with adjustable amplitude based on DDS

　　1 Introduction

　　Signal generators are widely used in teaching experiments and scientific research projects. Direct digital frequency synthesis technology (DDS) has the advantages of high frequency resolution, fast switching speed, continuous output signal phase, arbitrary waveform signal output, and full digital automatic control, making it the first choice for signal sources in radar, communication, engineering design and other systems. In the fields of spread spectrum and frequency hopping systems, digital broadcasting, high-definition television, linear frequency modulation, instrumentation, and electronic measurement, DDS has gradually become the core technology of high-performance signal generators. This paper proposes a design scheme for an alternating signal generator based on AT89S52 and AD9850. Its amplitude modulation circuit uses TLC5615, which simplifies the circuit design, improves the current amplitude controllable signal source circuit design, and improves the control accuracy.

　　2 System composition

　　This system design uses the single-chip microcomputer AT89S52 as the controller, with microprocessor application technology and DDS AD9850 technology as the core. The microprocessor controls AD9850 to realize functions such as frequency preset and control word setting. AD9850 realizes the function of signal generator, and the microprocessor controls the D/A converter TLC5615, thereby controlling the multiplier AD534 to realize the adjustability of the amplitude of the sine signal. The system hardware circuit design consists of a single-chip microcomputer system control circuit, a sine signal generator function circuit, an amplitude modulation circuit, a filter circuit, and a power amplifier circuit. The system structure block diagram is shown in Figure 1.

　　3 Functional module design

　　3.1 Signal generation module

　　The DDS device AD9850 from ADI is used, and the single-chip microcomputer is used as the controller to realize frequency synthesis and control. AD9850 integrates a 32-bit phase accumulator, a sine lookup table and a 10-bit high-speed digital-to-analog converter, and the phase accumulator is the core. The highest clock reference frequency of the device is 125 MHz, and the lowest clock reference frequency is 1 MHz. When the system clock is lower than the lowest clock frequency, the system automatically enters sleep mode. AD9850 contains a 40-bit data register, including a 32-bit frequency control word, a 5-bit phase control word, a 1-bit power sleep control word, and 2 bits reserved by the manufacturer. The 40-bit control word can be input in parallel or serially. The output frequency fout of AD9850 is determined by the input reference clock and the 32-bit frequency control word, that is, fout=△phase×fclk/232. Among them, △phase is the 32-bit frequency control word, and fclk is the input reference clock frequency.

　　Figure 2 is the signal generation circuit. This system design controls the internal registers through the parallel port and uses an external 12 MHz reference clock input. The full-scale output current of the DAC is 20 mA. When the full-scale current output by the IOUTB and IOUT pins is 10 mA, the spurious-free range performance of the output signal is optimal. After weighing, a 0.1 kΩ resistor is connected to the IOUTB and IOUT pins respectively, so that the peak-to-peak value of the sinusoidal signal output by the AD9850 is 1 V. At this time, the circuit output is the required sine wave, but the sine wave needs to be adjusted to meet the actual design requirements.

　　3.2 Amplitude adjustment module

　　Since the sine signal output by AD9850 has only a fixed amplitude, it cannot meet the requirement of amplitude adjustment. Therefore, a programmable amplifier is used to achieve amplitude control. However, this method can only achieve multiple adjustment, but cannot achieve high-precision continuous adjustment. The sine amplitude control in this design must be continuously adjustable and high-precision, so the D/A converter TLC5615 is used to control the input signal of AD534 to achieve continuous amplitude modulation. TLC5615 is a serial 10-bit D/A converter. The maximum output voltage is twice the reference voltage value. It has a power-on reset function. Only three serial buses are needed to complete the serial input of 10-bit data. It is easy to connect to the industrial standard microprocessor or microcontroller interface, simplifying the circuit design. The output function of TLC5615 is VKZ=2×VREFIN×D/210, where VREFIN is the reference voltage. In this design, VREFIN is 2.5 V; D is the frequency control word, which can be set by software programmable according to needs. The microprocessor controls TLC5615 to achieve 10-bit amplitude adjustment with an accuracy of 0.005 V.

　　AD534 is a low drift single-channel amplifier with a wide operating frequency band and a small error rate. The input signal is a differential (double-ended) input mode, that is, only differential signals can enter the amplifier to filter out common-mode signals. Its transfer function VO = (X1-X2)(Y1-Y2)/(10V)+Z2. In this system, X2, Y2 and Z2 are all grounded, and the two-way multiplication signal is changed to a single-ended input to ground, and the output voltage is linearly controlled. Its output voltage is: VOUT = VDDS×VKZ = 2×VREFIN×(D/210)×VDDS. Among them, VOUT is the output of the amplitude adjustment module, and VDDS is the output of AD9850. Since the output amplitude of AD9850 is 1 V, VOUT is determined by TLC5615 to achieve adjustable amplitude. Its circuit is shown in Figure 3.

　　3.3 Filter module

　　The sinusoidal signal output by AD9850 contains a DC component, but the system design requires no DC component output, so high-pass filtering is required. There is no low-pass filter inside the AD9850. The internal D/A conversion and system clock may generate high-frequency noise, so the sinusoidal signal output by the DAC inevitably contains high-frequency noise. In order to prevent high-frequency interference from causing disorder in the magnetic field and causing measurement errors, a low-pass filter should be added to the signal output port to suppress high-frequency interference, so that the two form a bandpass filter. During the hardware circuit test, the amplitude fluctuation of the active bandpass filter directly designed within the passband is large, the consistency is poor, and it cannot meet the application requirements. According to the actual requirements, a filter circuit is designed in which a second-order active voltage-controlled voltage source high-pass filter and a first-order low-pass filter are connected in series. The passband range of the system is 50 Hz to 3 kHz, the amplification factor is 2, and the Q value is 1. Its bandpass filter circuit is shown in Figure 4. [page]

　　4 Software Design

　　The system software design is written in C language. Compared with assembly language, C language is convenient for operating the underlying hardware of the machine, has a high degree of modularization, and good readability and portability. The software design completes the management of all functions of the signal generator and consists of two major parts: the initialization module and the functional module. The initialization module is used to initialize various hardware registers, data registers, and display components.

　　The functional module consists of three parts: display module, keyboard input module and signal generation module. The keyboard module is mainly used to set frequency, phase and amplitude. The system software design flow chart is shown in Figure 5.

　　5 Conclusion

　　This system design solves the problem of adjustable amplitude of signal generator with AD9850 and TLC5615 as the core. In the application of alternating magnetic field measuring instrument, it produces relatively ideal waveform data, and the waveform is smooth without obvious burrs, and its amplitude adjustment accuracy can reach 0.007 V. At present, signal generator has a wide range of application prospects, but the accuracy needs to be further improved.