Design of Programmable Logic Device and Single Chip Microcomputer in Dual Controller

　　In traditional control systems, people often use single-chip microcomputers as the control core. However, this method has complex hardware connections and poor reliability. In addition, the number of ports, internal timers and interrupt sources of single-chip microcomputers are limited, and in practical applications, external expansion chips are often required. This undoubtedly brings many inconveniences to the design of the system.

　　Now many systems use programmable logic devices (CPLD) as the control core. Compared with traditional designs, it not only simplifies the interface and control, improves the overall performance and reliability of the system, but also creates conditions for system integration. However, the D flip-flop resources of programmable logic devices are very limited, and programmable logic devices are not as convenient as single-chip microcomputers in controlling timing. Many unfamiliar users often find it very difficult to use. The two-way communication controller composed of programmable logic devices and single-chip microcomputers overcomes the shortcomings of both and maximizes the advantages of both.

　　1 Principle of bidirectional serial communication between CPLD and MCU AT89C51

　　1.1 Serial communication from MCU to PLD

　　The serial communication interface circuit from the microcontroller to the CPLD is designed in the CPLD using the VHDL language to design an eight-bit shift register with serial input and parallel output, and its port is connected to P1.4~P1.7 of the microcontroller, as shown in Figure 1. CS is the microcontroller selection signal, and when it is low, the eight-bit register is enabled; when the rising edge of the DCLOCK signal reaches the clk port, the eight-bit shift register will shift in one bit of data output by the microcontroller to cxin; when the eight-bit data in the microcontroller A register is to be transmitted to the CPLD, eight consecutive rising edges are generated at P1.6, and the microcontroller will sequentially shift the data in A to cxin, and after eight times, the data segment in A will appear in cxout of the CPLD.

      The VHDL source program is as follows:

　　entity cuanxing is

　　port (clk,cxin,cs:in std_logic;

　　cxout:out std_logic_vector(7 downto 0));

　　end;

　　architecture rtl of cuanxing is

　　signal shift:std_logic_vector(7 downto 0); parallel output of eight-bit temporary variables

　　begin

　　process(clk)

　　begin

　　if(cs=\'0\')then

　　shift<=(others=>\'0\'); if not selected, output all zeros

　　elsif(clk\'event and clk=\'1\')then;If the rising edge reaches clk, it is selected.

　　shift(7 downto 1)<=shift(6 downto 0); eight bits of data are shifted forward one bit

　　shift(0)<=cxin; the lowest bit is input by cxin

　　end if;

　　end process;

　　cxout<=shift; send eight-bit variable to port

　　end rtl；

　　The corresponding single-chip microcomputer control subroutine is as follows (the data to be sent is stored in A):

　　CS EQU P1.4

　　EN EQ P1.5

　　DCLOCK EQU P1.6

　　DEAD EQU P1.7

　　CONV：PUSH 07H

　　MOV R7,#8 ; store the shift number 8 into R7

　　CLR DCLOCK

　　SETB CS ; Select shift register

　　CLR IN

　　CLR C

　　JXL: RLC A; shift left one bit and send the data to be sent to CY

　　MOV DOUT, C ; send to port

　　ACALL YS1MS[page]

　　SETB DCLOCK; Give a rising edge to shift data into the shift register

　　ACALL YS1MS

　　CLR DCLOCK

　　DJNZ R7, JXL; if it is less than 8 times, send the next one

　　SETB EN; All eight bits of command words are shifted in, giving EN a rising edge to make the CPLD perform the corresponding operation

　　ACALL YS1MS

　　POP 07H

　　RIGHT
 

　　1.3 Serial communication from PLD to MCU

　　The serial communication from PLD to MCU is similar to the serial communication from MCU to PLD, except that the eight-bit register is changed to parallel input and serial output, and its port is shown in Figure 2. When the MCU's cs=1, the register is selected; when load=1, the data to be sent is loaded to bxin; when the clk rising edge arrives, the data is shifted out to bxout one bit at a time, and at the same time, the MCU receives the data from bxout one bit at a time. After eight rising edges of clk, the data loaded into bxin is transmitted to the A register of the MCU (the VHDL and MCU source program are not given due to space limitations).

　　2 Implementation principle of dual control system

　　Since the microcontroller has limited ports, most of the peripheral device connections are completed by CPLD, while those peripheral devices with higher requirements for timing control are indirectly controlled by the microcontroller. The so-called indirect control means that the user can customize many command words, and each command word corresponds to one or a series of operations of CPLD. When the microcontroller wants an external device to implement a certain function, it can transmit the command word to the programmable logic device CPLD through serial communication. After the CPLD receives the command word and judges the command word, it will perform the corresponding operation after the rising edge of EN arrives. It is worth mentioning here that after the command word is transmitted to the CPLD, the CPLD can only perform the corresponding operation after the rising edge of EN arrives. This is to prevent the command word from causing the CPLD to malfunction during the word transmission.

　　When an external device has an interrupt signal fed back to the controller, a specific command word can also be sent from CPLD to AT89C51, causing AT89C51 to generate an interrupt for processing. However, no matter how many peripheral devices need to generate interrupt control. In the AT89CF51 interrupt subroutine, the serial communication program from CPLD to the microcontroller is run, and the specific command word is read into the A register, so that it can be known whether it is an interrupt generated by a peripheral device (defined by the user), and then what kind of external operation is required.

　　This dual control system is very flexible and convenient to use in project design. Here, an eight-bit command word is used, and up to 256 command words can be customized. Since both a single-chip microcomputer and a CPLD are used, programming is very flexible and convenient, and engineers can choose accordingly according to their own characteristics. For example, some people's single-chip microcomputer programming ability is slightly better than CPLD language programming, so he can define the operation corresponding to the command word in VHDL language programming to be simpler (the simplest is to make a certain pin high or low); if you want to simplify the programming of the single-chip microcomputer, you can make the operation corresponding to the specific command word in VHDL language programming more complicated.

　　The programming process of the microcontroller is to write different command words to the A register and then call the serial communication subroutine. If it is a VHDL command word, then call the serial communication subroutine. If the VHDL command word corresponds to a simpler program, then more command word calls will be required to complete the operation of a specific peripheral device. Vice versa, that's all.

　　In short, it is much easier to develop projects using a dual controller consisting of a single-chip microcomputer and a CPLD than to use them separately.