FPGA-to-ASIC integration brings flexibility to automotive microcontrollers

Microcontrollers (MCUs), which are widely used in automotive electronics, have been developing at full speed and are now facing time and cost barriers. The main benefits of using MCUs have always been the high level of system integration and relatively low cost. However, there are additional hidden costs when using MCUs that far exceed the value of these devices. For example, if the selected device does not have all the features required, external logic, software or other integrated devices must be added.

In addition, in today's automotive field, the change of end-market requirements is common, and the desired MCU is often not available. Even many MCUs with specialized features and a fixed number of dedicated interfaces no longer meet market needs after a short evaluation period, and system suppliers have to redesign the hardware and write related software, and in some cases even change the processor core. The

Microcontroller Dilemma

Microcontroller manufacturers face challenges that affect the entire market. MCUs are application-specific products; therefore, each application requires a new device with a different set of features. In order to enable a single core architecture to serve a larger market demand, manufacturers offer MCU series with multiple specifications and different interfaces and functions. In most cases, this feature set does not meet the specific needs of customers; so for high-volume customer needs, a device with new interfaces and new functions has to be derived around a specific core architecture.

This strategy was successful when MCUs were implemented in older process technologies with relatively low manufacturing costs. However, as system integration increased, advanced process technologies were increasingly adopted, and the cost of developing new MCU variants became very considerable. Since only a few target markets could provide the required volumes, it was not economically feasible to develop a dedicated device to meet a specific customer need. As a result, new MCUs were equipped with increasingly

rich features to cater to all markets, and the strategy was to move to more feature-rich standard products rather than special application devices. Although these standard products are very powerful, their costs have also increased dramatically, making it more difficult to meet the requirements of cost-sensitive markets such as automotive electronics.

We will be helpless if we do not eliminate the root cause of this dilemma, which is that the functions within the chip are fixed. Therefore, a new design approach is clearly needed.

The concept of flexible MCUs

The way to solve this puzzle is to flexibly implement each function using FPGAs. FPGAs are a strong and viable alternative to MCUs because they can significantly reduce engineering development time and reduce the cost of multiple silicon respins. For example, an FPGA-based approach to developing flexible graphics systems for car audio and navigation devices can reduce development time by six months.

Unlike MCUs that do not have the required features, FPGAs can be programmed and reprogrammed as needed during the design process, resulting in faster prototype generation and faster time to market. If the needs change, the FPGA can also be upgraded in the field, even after it is installed in the product.

Automotive graphics controllers are one of the key applications where FPGAs are superior to traditional MCUs. In the automotive market, while low-cost FPGAs are well established for limited-function applications such as graphics, more complex functions are too expensive to implement with programmable devices because of the huge silicon overhead required to achieve programmability.

However, with the ability to seamlessly convert from FPGAs to structured ASICs, it is possible to achieve a cost-effective MCU that truly meets user requirements, with features that can be requested on demand from a large library of predefined and scalable building blocks.

The main difference from traditional MCUs is the seamless migration from prototype FPGAs to final MCUs. In the flexible MCU concept, both the CPU and the bus architecture are unique and can be mapped to the design according to the actual functions and features required by a specific customer application.

RISC CPU

The CPU used in the Altera concept is a soft RISC processor. However, unlike the general case, the processor is not built in a predefined and unchangeable chip. Instead, it is automatically generated according to the specifications defined by the system architect/design engineer with the help of available tools and downloaded into the FPGA together with the rest of the logic required for the entire circuit. Therefore, the processor core can be parameterized according to the specific application requirements and with the help of relevant development tools. More importantly, it can achieve the functions that are really needed and the corresponding logic consumption.

In Altera-based flexible MCU applications, the Nios®II embedded processor uses a standard RISC architecture with 32-bit independent address and data buses. Both buses are controlled by independent caches and can be connected to the bus system continuously and independently. Finally, it is up to the system architect to decide whether to use independent storage spaces or shared memory for programs and data. The Nios®II embedded processor has many functional units built into it that are common in general processors, but the parameter settings determine its characteristics. For example, hardware multipliers, barrel shifters, and hardware dividers are available as optional features. The same is true for instruction and data caches, which can be of different sizes or excluded entirely.

Bus Architecture

MCUs typically use a single bus architecture with an arbiter monitoring the bus as a distributed resource. This architecture has serious drawbacks because the bus, as the central resource of the system, can quickly become a bottleneck. For this reason, multi-layer bus architectures have been used in newer systems (especially system-on-chip implementations) where the buses are operated in parallel. The current FPGA bus architecture situation is basically the same. The difference is that in other multi-layer bus implementations, the number of layers used is static; while the FPGA bus construction method can select the number of layers as needed.

When considering electromagnetic compatibility (EMC) and power consumption issues, sometimes it is beneficial to have a peripheral module run at a different frequency than the rest of the system. For example, running a memory interface at a faster speed (while the rest of the system runs at a lower clock rate) will correspondingly reduce memory access time. Another case is to integrate multiple modules where a lower clock frequency is sufficient.

To meet EMC or power requirements, advanced system design tools such as SOPC Builder can easily separate these components from those running at very high frequencies in the system. Such tools can automatically generate the logic required to synchronize these different clock domains, and designers only need to indicate which modules are running in a given clock domain.

Implementing MCUs in FPGAs

Because the complexity of automotive MCU systems is much higher than that of simple graphics controllers, FPGAs are generally used for prototype logic generation in most cases. Since FPGAs have the ability to fully verify, develop firmware, and conduct field testing, the selection of FPGAs for prototyping will greatly reduce development risks. In addition, by using FPGAs for prototyping, designers can run the FPGA in an "in-system" manner to verify using a real environment, which may detect design defects that were not discovered during simulation.

Software development has become a large part of the entire development cycle. Because software development takes longer and requires more resources, prototyping systems can be used to shorten the entire development cycle and discover design defects, compatibility issues, and support functions that cannot be properly handled or implemented in software through new hardware functions. [page]

Field testing with actual systems can help discover system or device defects that cannot be discovered in the laboratory. In many cases, a demonstration system is essential for salespeople to convince customers to place an order in advance.

New features and functions that were not in the original specification may also be required. Whether to discover new defects or add new functions, FPGA prototypes can be modified quickly without incurring huge one-time engineering costs or enduring long manufacturing cycles.

The final step in the Flexible MCU concept is ASIC development. Once the prototype system has been built and tested, the conversion of the design to a structured ASIC can begin. For example, if Altera devices are used, the design is immediately converted to a HardCopy® structured ASIC device. Unlike other structured ASICs, this design flow does not require re-synthesis of the design or additional verification cycles because these devices use the same building blocks as their FPGA counterparts. The

fast turnaround time provided by this structured ASIC flow allows designers to quickly confirm the FPGA logic, allowing for a fast and low-cost conversion.

Flexible MCU Summary

The next generation of automotive electronic systems requires highly specialized, cost-optimized devices to meet market requirements. Given the dramatic increase in development costs for advanced process technologies, the specialization of traditional MCUs no longer makes commercial sense.

Devices that are feature-rich and target a broad range of application markets are often too expensive to be viable. Instead, the Flexible MCU concept enables the development of the right MCU for a specific application by implementing an FPGA prototype. Verification, software development, and field testing can be performed immediately after the design is completed, or even in parallel.

For volume production, the FPGA design can be directly mapped to a structured ASIC without the need for re-synthesis or additional verification. The above approach can create an application-optimized automotive MCU in a much shorter time and at a much lower cost than the current approach using fixed-function MCUs.

Figure 1: This automotive infotainment platform has multiple subsystems and scalable interfaces and functions

Figure 2: The path from FPGA to ASIC integration has significantly improved the performance and features of MCUs (lower X-axis)