System Expansion of Large Capacity Data Storage in Single Chip Microcomputer System

1 Introduction

When the MCS-51 single-chip microcomputer system is expanded, the P0 port is generally used as the lower 8 bits of the address (time-sharing with the data port), and the P2 port is used as the higher 8 bits of the address. It has a total of 16 address buses and an addressing space of 64KB. However, in actual applications, there are some special occasions, such as the collection of voice signals, the storage of program-controlled exchange call records, the collection of topographic map signals, etc., which require a data storage device larger than 64KB. Based on the application system actually used by the author, this article introduces an expansion system for large-capacity data storage. The system host uses 8031 ​​and expands three 62256 chips, with a total of 96KB of dynamic data storage. The above introduces its hardware composition and software processing method.

2 Hardware composition of the system

62256 is a 32K×8-bit data storage device with a total of 15 address lines. The hardware connection principle of the expanded 96KB data storage device is shown in Figure 1: In order to expand other peripherals for the system, 14 address lines of the system are occupied. The 15th address lines of the three 62256s are all connected to the I/O port P1.0 of the 8031, while the chip select of 62256 (1) is connected to P1.1, the chip select of 62256 (2) is connected to P1.2, and the chip select of 62256 (2) is connected to P1.3. This connection method divides the 96KB storage space into 6 pages, and each 62256 occupies 2 pages of storage space. The address allocation of each chip is as follows:

3 Software Processing Method

When accessing the data memory, the page search method is used. First, find the page number to be accessed, then open the page, and search for a unit in the page. The software has pre-programmed subroutines to open a page. To access 96KB of storage space, that is, the address range is 00000H-17FFFH, it is obvious that the 16-bit address register DPTR cannot store it. Here, the address is loaded into the first three consecutive units of PAM, that is, the content of the first three units of 62256 (1) (that is, the address of a unit to be accessed), and the data is divided by 4000H. The quotient is the page number of the unit, and the remainder is the address in the page. Then, the scatter instruction in the MCS-51 instruction is used to open the page and access the unit in the page. The specific software implementation is shown in the program list below.

4 Conclusion

In an industrial television image monitoring system designed by the author, since it is necessary to use the main keyboard programmable menu and collect various information on site, such as alarms, decoding box status, etc., the required PAM far exceeds the capacity of 64KB. Therefore, the above hardware design method and software processing method are adopted, which is very convenient to use. According to the above processing method, a larger PAM can be expanded