Design and implementation of industrial ultrasonic flaw detector based on S3C2440 microprocessor

    There are many types of ultrasonic flaw detectors, but in the actual flaw detection process, pulse reflection ultrasonic flaw detectors are the most widely used. Generally, in uniform materials, the presence of defects will cause material discontinuity, and this discontinuity often causes inconsistent acoustic impedance. From the reflection theorem, we know that ultrasonic waves will be reflected at the interface of two media with different acoustic impedances. The amount of energy reflected back is related to the difference in acoustic impedance of the media on both sides of the interface and the orientation and size of the interface. Pulse reflection ultrasonic flaw detectors are designed based on this principle.

　　In ultrasonic flaw detection, the most commonly used is the A-type display, as shown in Figure 1. In the A-type display, the horizontal axis represents the depth of the object being tested, and the vertical axis represents the amplitude of the echo signal.

　　This paper uses ARM9 chip and high-speed FPGA data acquisition and signal processing technology to design and implement a new digital ultrasonic flaw detector on the Linux operating system platform. The flaw detector has the characteristics of high performance, low cost, rich peripheral interface expansion and low power consumption.

　　Design concept and overall plan

　　The embedded flaw detector in this design consists of two parts: one is the analog signal front end, including the ultrasonic transmitting and receiving circuit and the power supply circuit; the other is the digital signal acquisition processing and control back end, referred to as the ultrasonic main control computer. The overall block diagram of the system hardware is shown in Figure 2.

Figure 2 Overall block diagram of system hardware[page]

　　The system uses S3C2440 processor with built-in ARM920T core. This design applies many features of this chip: up to 203MHz main frequency; internal integrated LCD controller; 3-way asynchronous serial communication interface; built-in watchdog timing circuit and real-time clock; internal integration of two USB hosts and one USB device; good support for embedded Linux, etc.

　　In terms of ultra-high-speed data acquisition, the Spartan-3 structure used in this system is similar to Virtex-II, with a 1.2V core, which has obvious advantages in ultra-high-speed data acquisition and signal processing. In terms of instrument performance, in order to ensure the detection accuracy of the digital ultrasonic flaw detector of 0.01mm and the variable detection range of 0-6000mm, the following digital signal processing is mainly performed in the FPGA:

　　◆ 60MHz hardware sampling rate is processed by four-time phase shift clock to achieve an equivalent high sampling rate of 240MHz

　　◆ Digital filtering, program-controlled bandpass FIR filter ensures good digital filtering of 0.5MHz~15MHz echo signals

　　◆ Digital detection, including positive, negative, bidirectional and RF detection

　　◆ Intelligent extraction (dynamic allocation algorithm of extraction points to ensure horizontal linearity of displayed waveform)

　　◆ Real-time flaw detection alarm (hardware alarm gate)

　　In terms of instrument functions, the advantages of the ARM+Linux embedded system are fully utilized to expand the rich interfaces such as network and USB, so that the instrument can realize the synchronous real-time display of the host computer software under Windows on the PC and the LCD on the flaw detector, download the flaw detection parameters and upload the flaw detection data and pictures at any time, and enable the machine to connect to many devices such as U disk, mobile hard disk, USB printer, etc.

　　This design uses the latest Linux kernel (Linux2.6.16), which is far superior to the traditional 2.4 kernel in terms of response speed, driver functions, etc. In the development process of this project, the network file system is used; in the final product, the ext2 file system on DOC (MTD) is used.

　　System hardware resource allocation

　　Bus assignment

　　The address bus of S3C2440 is 32 bits (4G) internally and 27 bits (128M) externally. The data bus width is 32 bits. When the peripheral chip is connected to the CPU, the data bus width of the host computer can be set to 32-bit, 16-bit or 8-bit mode. The setting is implemented in the DW bit in the BWSCON register. The bus connection method of each external device is shown in Table 1.

　　External address space allocation

　　S3C2440 provides 8 chip selects, nGCS[0～7], each chip select has a fixed address, and each chip select has a fixed interval of 128MB. [page]

　　The address spaces corresponding to the peripheral interface devices in this system are:

　　(1) NOR FLASH, nGCS0, is connected to an 8M × 16-bit INTEL TE28F128 FLASH, which is used to store the ppcboot boot program and the Linux kernel;

　　(2) Network chip DM9000, using nGCS1, is used for transferring and storing network transmission and reception data;

　　(3) DOC, using nGCS2, stores the file system including management programs, system commands, etc.

　　(4) FPGA is connected to nGCS3 and nGCS4; keyboard+led uses nGCS3, and front-end digital signal processing uses nGCS4.

　　(5) The main computer memory consists of two 16M × 16-bit SDRAMs, which are arranged in 32-bit mode and share nGCS6. A total of 64M RAM is used for dynamic data caching.

　　Interrupt resource allocation

　　S3C2440 can handle 56 interrupts, of which 24 are external interrupts EINTn. Among the peripheral interfaces extended on the board, the network interface chip DM9000 uses EINT0. The FPGA extended interrupt resources are EINT1, EINT2, EINT3, EINT4, EINT5, EINT6 and EINT7. The keyboard uses EINT2, the front-end image data update uses EINT3, the echo frequency test data update uses EINT4, and the system shutdown button uses EINT1.

　　System software design

　　The overall block diagram of the system software is shown in Figure 3.

Figure 3 System software overall block diagram

　　The ultrasonic flaw detection system has to handle many tasks at the same time, and the real-time requirements are high, so multi-threading technology is used in the flaw detection application. This system can be divided into four threads. In the main thread, MiniGUI is used to implement the functions of the three modules of real-time flaw detection, parameter download and report printing. In addition, three auxiliary threads are created, namely:

　　The data reading thread is used to read real-time flaw detection data; the keyboard reading thread reads the key value pressed on the keyboard, and then sends a key message through SendMessage (hWnd, iMsg, wParam, lParam), which will be processed in the main window process function of MiniGUI; the network thread transmits flaw detection data to the host computer and receives control commands from the host computer.

    Test and Conclusion

　　Tests show that the functions and indicators of this design prototype meet or exceed the requirements of the national industry standard JB/T 10061-1999 "General Technical Requirements for Type A Pulse Reflection Ultrasonic Flaw Detectors". Among them, the most important indicator of ultrasonic flaw detectors, the flaw detection sensitivity margin, is as high as 68dB (the same standard stipulates no less than 46 dB), and the thin plate resolution is less than 1mm (the national standard stipulates no more than 3mm).

　　The trial has proved that this embedded digital ultrasonic flaw detector design project has many advantages such as excellent performance, high reliability, friendly interface, convenient operation, and high cost performance. It is at the leading level in the field of domestic industrial ultrasonic flaw detectors.

References:

[1]. S3C2440 datasheet http://www.dzsc.com/datasheet/S3C2440_589562.html.
[2]. ARM920T datasheet http://www.dzsc.com/datasheet/ARM920T_139814.html.
[3]. DM9000 datasheet http://www.dzsc.com/datasheet/DM9000_979498.html.