1.1__S3C2440 startup process analysis-EEWORLD

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The s3c2440 has 4KB of SRAM built in, and can choose NOR or NAND boot. Wei Dongshan's S3C2440 development board is connected to 256MB of Nand Flash and Nor Flash, which can be selected through the M0 and M1 pins, where M1 is fixed low.

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Therefore, pull M0 low to select Nand startup, and pull M0 high to select Nor startup.

When Nand starts, the base address of the on-chip 4K RAM is 0, and the Nor Flash is inaccessible. The 2440 hardware will copy the internal control of the first 4K of Nand Flash to the on-chip RAM, and then the CPU will remove the first instruction from address 0 for execution.

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When Nor starts, the base address of Nor Flash is 0, the starting address of on-chip RAM is 0x4000 0000, the CPU reads the first instruction (the first 4 bytes) on Nor, and the CPU continues to read other instructions for execution.

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So the stack is set up like this:

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Keywords：S3C2440 Reference address：1.1__S3C2440 startup process analysis

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